Power cable with different types of connectors
Disclosed herein are a power cable and a power supply system including the power cable. The power cable includes a 12VHPWR connector disposed at a first end of the power cable; a plurality of PCIE 2×4 connectors disposed at a second end of the power cable; and a converting circuit coupled with the 12VHPWR connector via a first cable and coupled with the plurality of the PCIE 2×4 connectors via a plurality of second cables. The converting circuit includes at least one AND gate configured to couple sensing pins of the plurality of PCIE 2×4 connectors with a sensing pin of the 12VHPWR connector.
1. A power cable comprising:
a 12VHPWR connector disposed at a first end of the power cable;
a plurality of PCIE 2×4 connectors disposed at a second end of the power cable; and
a converting circuit coupled with the 12VHPWR connector via a first cable and coupled with the plurality of the PCIE 2×4 connectors via a plurality of second cables, the converting circuit comprising at least one AND gate configured to couple sensing pins of the plurality of PCIE 2×4 connectors with a sensing pin of the 12VHPWR connector.
2. The power cable of claim 1 , wherein:
the plurality of the PCIE 2×4 connectors consist of two PCIE 2×4 connectors;
the at least one AND gate couples sensing pins of the two PCIE 2×4 connectors for providing a Sense 0 signal to a sensing pin of the 12VHPWR connector for providing the Sense 0 signal; and
the converting circuit decouples a sensing pin of the 12VHPWR connector that provides a Sense 1 signal from sensing pins of the two PCIE 2×4 connectors that provide the Sense 1 signal.
3. The power cable of claim 1 , wherein:
the plurality of the PCIE 2×4 connectors consist of three PCIE 2×4 connectors;
the converting circuit includes two cascaded AND gates configured to couple sensing pins of the three PCIE 2×4 connectors for providing a Sense 1 signal with a sensing pin of the 12VHPWR connector for providing the Sense 1 signal; and
the converting circuit decouples a sensing pin of the 12VHPWR connector that provides a Sense 0 signal from sensing pins of the three PCIE 2×4 connectors that provide the Sense 0 signal.
4. The power cable of claim 1 ,
wherein the plurality of the PCIE 2×4 connectors consist of four PCIE 2×4 connectors, and the converting circuit includes a plurality of cascaded AND gates.
5. The power cable of claim 4 , wherein the plurality of AND gates include a first group of AND gates coupled with a sensing pin S3 of the 12VHPWR connector and a second group of AND gates coupled with a sensing pin S4 of the 12VHPWR connector.
6. The power cable of claim 5 , wherein the first group of AND gates are coupled with No. 6 sensing pins of the four PCIE 2×4 connectors.
7. The power cable of claim 6 , wherein the second group of AND gates are coupled with No. 4 sensing pins of the four PCIE 2×4 connectors.
8. The power cable of claim 7 , wherein the plurality of the AND gates are configured to provide GROUND signals to sensing pins S3 and S4 of the 12VHPWR connector when the four PCIE 2×4 connectors are plugged into a power supply unit.
9. The power cable of claim 1 , wherein the first cable includes 16 wires.
10. The power cable of claim 9 , wherein each of the second cables includes 8 wires.
11. The power cable of claim 1 , wherein the converting circuit couples power pins of the at least one PCIE 2×4 connector with power pins of the 12VHPWR connector.
12. The power cable of claim 11 , wherein the converting circuit couples COM pins of the at least one PCIE 2×4 connector with COM pins of the 12VHPWR connector.
13. A power supply system comprising:
a power supply unit comprising output ports configured to mate with PCIE 2×4 connectors; and
a power cable comprising:
a 12VHPWR connector disposed at a first end of the power cable;
a plurality of PCIE 2×4 connectors disposed at a second end of the power cable and connected to the output ports of the power supply unit; and
a converting circuit coupled with the 12VHPWR connector via a first cable and coupled with the plurality of the PCIE 2×4 connectors via a plurality of second cables,
wherein the converting circuit comprises at least one AND gate configured to couple sensing pins of the plurality of PCIE 2×4 connectors with a sensing pin of the 12VHPWR connector.
14. The power supply system of claim 13 , wherein:
the plurality of the PCIE 2×4 connectors consist of two PCIE 2×4 connectors;
the at least one AND gate couples sensing pins of the two PCIE 2×4 connectors for providing a Sense 0 signal with a sensing pin of the 12VHPWR connector for providing the Sense 0 signal; and
the converting circuit decouples a sensing pin of the 12VHPWR connector that provides a Sense 1 signal from sensing pins of the two PCIE 2×4 connectors that provide the Sense 1 signal.
15. The power supply system of claim 13 , wherein:
the plurality of the PCIE 2×4 connectors consist of three PCIE 2×4 connectors;
the converting circuit includes two cascaded AND gates configured to couple sensing pins of the plurality of PCIE 2×4 connectors for providing a Sense 1 signal with a sensing pin of the 12VHPWR connector for providing the Sense 1 signal; and
the converting circuit decouples a sensing pin of the 12VHPWR connector that provides a Sense 0 signal from sensing pins of the three PCIE 2×4 connectors that provide the Sense 0 signal.
16. The power supply system of claim 13 ,
wherein the plurality of the PCIE 2×4 connectors consist of four PCIE 2×4 connectors, and the converting circuit includes a plurality of cascaded AND gates.
17. The power supply system of claim 16 , wherein the plurality of AND gates include a first group of AND gates coupled with a sensing pin S3 of the 12VHPWR connector and a second group of AND gates coupled with a sensing pin S4 of the 12VHPWR connector.
18. The power supply system of claim 17 , wherein the first group of AND gates are coupled with No. 6 sensing pins of the four PCIE 2×4 connectors.
19. The power supply system of claim 18 , wherein the second group of AND gates are coupled with No. 4 sensing pins of the four PCIE 2×4 connectors, and wherein the plurality of the AND gates are configured to provide GROUND signals to sensing pins S3 and S4 of the 12VHPWR connector when the four PCIE 2×4 connectors are plugged into a power supply unit.
20. A method of coupling a plurality of PCIE 2×4 connectors with a 12VHPWR connector, comprising:
cascading one or more AND gates;
coupling power pins of the plurality of PCIE 2×4 connectors with power pins of the 12VHPWR connector; and
selectively coupling No. 4 and/or 6 sensing pins of the plurality of PCIE 2×4 connector with sensing pins S3 and/or S4 of the 12VHPWR connector via the one or more cascaded AND gates,
wherein:
when two PCIE 2×4 connectors are coupled with the 12VHPWR connector, the one or more cascaded AND gates only couple the No. 6 sensing pins of the two PCIE 2×4 connectors with the sensing pin S3 of the 12VHPWR connector;
when three PCIE 2×4 connectors are coupled with the 12VHPWR connector, the one or more cascaded AND gates only couple the No. 4 sensing pins of the three PCIE 2×4 connectors with the sensing pin S4 of the 12VHPWR connector; and
when four PCIE 2×4 connectors are coupled with the 12VHPWR connector, the one or more cascaded AND gates couple both the No. 6 sensing pins of the four PCIE 2×4 connectors with the sensing pin S3 of the 12VHPWR connector and the No. 4 sensing pins of the four PCIE 2×4 connectors with the sensing pin S4 of the 12VHPWR connector.