Power voltage generator, driver IC, and display device
A power voltage generator includes an analog reference voltage generator configured to generate an analog reference voltage based on a first input voltage, a resistance string configured to generate distribution voltages by performing voltage distribution on the analog reference voltage, a decoding unit configured to generate reference voltages by decoding the distribution voltages, and a regulator unit configured to generate driving voltages based on the reference voltages.
1. A power voltage generator comprising:
an analog reference voltage generator configured to generate an analog reference voltage based on a first input voltage;
a resistance string configured to generate distribution voltages by performing voltage distribution on the analog reference voltage;
a decoding unit configured to generate reference voltages by decoding the distribution voltages;
a regulator unit configured to generate driving voltages based on the reference voltages and supply at least one of the driving voltages to a gamma reference voltage generator to generate a gamma reference voltage.
2. The power voltage generator of claim 1 , wherein the analog reference voltage generator includes:
a first bandgap reference voltage generator configured to receive the first input voltage to generate a first bandgap reference voltage;
a first amplifier including a first input terminal configured to receive the first bandgap reference voltage, a second input terminal connected to a first node, and an output terminal configured to output a preliminary analog reference voltage;
a first resistance element including a first electrode connected to a ground and a second electrode connected to the first node;
a second resistance element including a first electrode connected to the first node and a second electrode connected to the output terminal of the first amplifier;
a second bandgap reference voltage generator configured to receive the preliminary analog reference voltage to generate a second bandgap reference voltage;
a second amplifier including a first input terminal configured to receive the second bandgap reference voltage, a second input terminal connected to a second node, and an output terminal configured to output the analog reference voltage;
a third resistance element including a first electrode connected to the ground and a second electrode connected to the second node; and
a fourth resistance element including a first electrode connected to the second node and a second electrode connected to the output terminal of the second amplifier.
3. The power voltage generator of claim 2 , wherein the first amplifier further includes a power terminal configured to receive the first input voltage.
4. The power voltage generator of claim 2 , wherein the second amplifier further includes a power terminal configured to receive the preliminary analog reference voltage.
5. The power voltage generator of claim 1 , wherein the analog reference voltage generator is configured to generate the analog reference voltage based on the first input voltage and a second input voltage that is smaller than the first input voltage.
6. The power voltage generator of claim 5 , wherein the analog reference voltage generator includes:
a first bandgap reference voltage generator configured to receive the second input voltage to generate a first bandgap reference voltage;
a first amplifier including a first input terminal configured to receive the first bandgap reference voltage, a second input terminal connected to a first node, an output terminal configured to output a preliminary analog reference voltage, and a power terminal configured to receive the first input voltage;
a first resistance element including a first electrode connected to a ground and a second electrode connected to the first node;
a second resistance element including a first electrode connected to the first node and a second electrode connected to the output terminal of the first amplifier;
a second bandgap reference voltage generator configured to receive the preliminary analog reference voltage to generate a second bandgap reference voltage;
a second amplifier including a first input terminal configured to receive the second bandgap reference voltage, a second input terminal connected to a second node, and an output terminal configured to output the analog reference voltage;
a third resistance element including a first electrode connected to the ground and a second electrode connected to the second node; and
a fourth resistance element including a first electrode connected to the second node and a second electrode connected to the output terminal of the second amplifier.
7. The power voltage generator of claim 6 , wherein the second amplifier further includes a power terminal configured to receive the preliminary analog reference voltage.
8. A driver integrated circuit (IC) comprising:
a power voltage generator configured to generate driving voltages;
a gamma reference voltage generator configured to receive at least one of the driving voltages to generate a gamma reference voltage; and
a data driver configured to generate data voltages based on the gamma reference voltage,
wherein the power voltage generator includes:
an analog reference voltage generator configured to generate an analog reference voltage based on a first input voltage for driving at least one of the data driver and the gamma reference voltage generator;
a resistance string configured to generate distribution voltages by performing voltage distribution on the analog reference voltage;
a decoding unit configured to generate reference voltages by decoding the distribution voltages; and
a regulator unit configured to generate the driving voltages based on the reference voltages and supply at least one of the driving voltages to the gamma reference voltage generator to generate the gamma reference voltage.
9. The driver IC of claim 8 , wherein the analog reference voltage generator includes:
a first bandgap reference voltage generator configured to receive the first input voltage to generate a first bandgap reference voltage;
a first amplifier including a first input terminal configured to receive the first bandgap reference voltage, a second input terminal connected to a first node, and an output terminal configured to output a preliminary analog reference voltage;
a first resistance element including a first electrode connected to a ground and a second electrode connected to the first node;
a second resistance element including a first electrode connected to the first node and a second electrode connected to the output terminal of the first amplifier;
a second bandgap reference voltage generator configured to receive the preliminary analog reference voltage to generate a second bandgap reference voltage;
a second amplifier including a first input terminal configured to receive the second bandgap reference voltage, a second input terminal connected to a second node, and an output terminal configured to output the analog reference voltage;
a third resistance element including a first electrode connected to the ground and a second electrode connected to the second node; and
a fourth resistance element including a first electrode connected to the second node and a second electrode connected to the output terminal of the second amplifier.
10. The driver IC of claim 9 , wherein the first amplifier further includes a power terminal configured to receive the first input voltage, and
wherein the second amplifier further includes a power terminal configured to receive the preliminary analog reference voltage.
11. The driver IC of claim 8 , wherein the analog reference voltage generator is configured to generate the analog reference voltage based on the first input voltage and a second input voltage that is smaller than the first input voltage.
12. The driver IC of claim 11 , wherein the analog reference voltage generator includes:
a first bandgap reference voltage generator configured to receive the second input voltage to generate a first bandgap reference voltage;
a first amplifier including a first input terminal configured to receive the first bandgap reference voltage, a second input terminal connected to a first node, an output terminal configured to output a preliminary analog reference voltage, and a power terminal configured to receive the first input voltage;
a first resistance element including a first electrode connected to a ground and a second electrode connected to the first node;
a second resistance element including a first electrode connected to the first node and a second electrode connected to the output terminal of the first amplifier;
a second bandgap reference voltage generator configured to receive the preliminary analog reference voltage to generate a second bandgap reference voltage;
a second amplifier including a first input terminal configured to receive the second bandgap reference voltage, a second input terminal connected to a second node, and an output terminal configured to output the analog reference voltage;
a third resistance element including a first electrode connected to the ground and a second electrode connected to the second node; and
a fourth resistance element including a first electrode connected to the second node and a second electrode connected to the output terminal of the second amplifier.
13. The driver IC of claim 8 , further comprising:
a timing controller configured to control the data driver and the gamma reference voltage generator.
14. A display device comprising:
a display panel including pixels to which at least one of driving voltages is input;
a gate driver configured to apply gate signals to the pixels; and
a driver integrated circuit (IC) configured to generate the driving voltages and to apply data voltages to the pixels,
wherein the driver IC includes:
a power voltage generator configured to generate the driving voltages;
a gamma reference voltage generator configured to generate a gamma reference voltage; and
a data driver configured to generate the data voltages based on the gamma reference voltage, and
wherein the power voltage generator includes:
an analog reference voltage generator configured to generate an analog reference voltage based on a first input voltage for driving at least one of the data driver and the gamma reference voltage generator;
resistance string configured to generate distribution voltages by performing voltage distribution on the analog reference voltage;
a decoding unit configured to generate reference voltages by decoding the distribution voltages; and
a regulator unit configured to generate the driving voltages based on the reference voltages and supply at least one of the driving voltages to the gamma reference voltage generator to generate the gamma reference voltage.
15. The display device of claim 14 , wherein the gate driver is configured to receive at least one of the driving voltages to generate the gate signals.
16. The display device of claim 14 , wherein the analog reference voltage generator includes:
a first bandgap reference voltage generator configured to receive the first input voltage to generate a first bandgap reference voltage;
a first amplifier including a first input terminal configured to receive the first bandgap reference voltage, a second input terminal connected to a first node, and an output terminal configured to output a preliminary analog reference voltage;
a first resistance element including a first electrode connected to a ground and a second electrode connected to the first node;
a second resistance element including a first electrode connected to the first node and a second electrode connected to the output terminal of the first amplifier;
a second bandgap reference voltage generator configured to receive the preliminary analog reference voltage to generate a second bandgap reference voltage;
a second amplifier including a first input terminal configured to receive the second bandgap reference voltage, a second input terminal connected to a second node, and an output terminal configured to output the analog reference voltage;
a third resistance element including a first electrode connected to the ground and a second electrode connected to the second node; and
a fourth resistance element including a first electrode connected to the second node and a second electrode connected to the output terminal of the second amplifier.
17. The display device of claim 14 , wherein the analog reference voltage generator is configured to generate the analog reference voltage based on the first input voltage and a second input voltage that is smaller than the first input voltage.
18. The display device of claim 17 , wherein the analog reference voltage generator includes:
a first bandgap reference voltage generator configured to receive the second input voltage to generate a first bandgap reference voltage;
a first amplifier including a first input terminal configured to receive the first bandgap reference voltage, a second input terminal connected to a first node, an output terminal configured to output a preliminary analog reference voltage, and a power terminal configured to receive the first input voltage;
a first resistance element including a first electrode connected to a ground and a second electrode connected to the first node;
a second resistance element including a first electrode connected to the first node and a second electrode connected to the output terminal of the first amplifier;
a second bandgap reference voltage generator configured to receive the preliminary analog reference voltage to generate a second bandgap reference voltage;
a second amplifier including a first input terminal configured to receive the second bandgap reference voltage, a second input terminal connected to a second node, and an output terminal configured to output the analog reference voltage;
a third resistance element including a first electrode connected to the ground and a second electrode connected to the second node; and
a fourth resistance element including a first electrode connected to the second node and a second electrode connected to the output terminal of the second amplifier.
19. The display device of claim 14 , further comprising:
a timing controller configured to control the gate driver, the data driver, and the gamma reference voltage generator.
20. The display device of claim 19 , wherein the timing controller is integrated into the driver IC.