Symbiotic network on layers
The technology relates to a system on chip (SoC). The SoC may include a plurality of network layers which may assist electrical communications either horizontally or vertically among components from different device layers. In one embodiment, a system on chip (SoC) includes a plurality of network layers, each network layer including one or more routers, and more than one device layers, each of the plurality of network layers respectively bonded to one of the device layers. In another embodiment, a method for forming a system on chip (SoC) includes forming a plurality of network layers in an interconnect, wherein each network layer is bonded to an active surface of a respective device layer in a plurality of device layer.
1. A network to horizontally and vertically route electrical communications between components of stacked device layers of a 3D system on chip (SoC), the network comprising:
a first network layer disposed between a first device layer and a second device layer, the first device layer comprising one or more first components and the second device layer comprising one or more second components;
a third device layer directly bonded to the second device layer, the third device layer comprising one or more third components in direct electrical communication with the one or more second components; and
a second network layer disposed between the third device layer and a fourth device layer comprising one or more fourth components, wherein the first network layer and the second network layer route electrical communications between at least one of the first components and one or more of the fourth components.
2. The network of claim 1 , wherein the second and third device layers each comprise one or more vertical structures that with the first and second network layers collectively provide one or more electrical communication pathways between the at least one first component and at least one fourth component.
3. The network of claim 2 , wherein:
a shortest physical distance between the at least one first component and the one or more of the fourth components is blocked by a second or third component; and
the first network, the second network, or both determine an electrical communication pathway between the at least one first component and the at least one fourth component.
4. The network of claim 3 , wherein the electrical communication pathway is determined based on relative physical locations of the one or more components of each of the first, second, third, and fourth device layers.
5. The network of claim 4 , wherein the relative physical locations are stored in a look-up table of the first or second network layers.
6. The network of claim 3 , wherein each of the first and second network layers independently determine a respective portion of the electrical communication pathway; and wherein
the first and second network layers collectively determine the electrical communication pathway.
7. The network of claim 1 , wherein the one or more second components and the one or more third components are in direct electrical communication via hybrid bonds formed between the second and third device layers.
8. The network of claim 1 , wherein:
the first network layer is directly bonded to each of the first and second device layers; and
the second network layer is directly bonded to each of the third and fourth device layers.
9. The network of claim 1 , wherein the first network layer and the second network layer are arranged in a master/slave relationship.
10. The network of claim 1 , wherein each of the one or more components of the respective first and fourth device layers comprises a network interface to packetize and depacketize data for communication via an electrical communication pathway.
11. The network of claim 1 , further comprising a third network layer disposed between the fourth device layer and a fifth device layer comprising one or more memory components.
12. The network of claim 11 , wherein one or more routers in the third network layer are in communication with the one or more memory components via interconnects formed between the third network layer and a fifth network layer by hybrid bonding.
13. The network of claim 12 , wherein the interconnects have a pitch between 1 μm and 10 μm.
14. The network of claim 1 , wherein the first network layer is directly bonded to an active surface of the first device layer.
15. The network of claim 1 , wherein one or more routers in the first network layer are in communication with the one or more first components via interconnects formed between the first network layer and the first device layer by hybrid bonding.
16. The network of claim 1 , wherein one of the device layers comprises at least two singulated die disposed in a side-by-side arrangement and an insulating material disposed in a space between the at least two singulated die.
17. The network of claim 16 , wherein the at least two singulated die are directly bonded to at least one of the network layers, the at least one network layer comprises two separate portions, and the insulating material extends vertically from between the at least two singulated die into a space between the two separated portions.
18. The network of claim 1 , wherein the electrical communications between the first and fourth components are routed between the first and second network layers via a second or third component; and wherein
the electrical communications comprise data and the second or third component transfers the data to the first or second network layers via a routing interface.