IP Library › Granted Patent US 12,739,415
Granted Patent B2
US 12,739,415 · App. 18/392,570 · Granted Sep 15, 2026

Image processing device, mobile device, and method of operating the same

Inventors: Wonseok Lee (Suwon-si, KR); Kyungil Kim (Suwon-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H04N19/433H04N19/182
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Quick Facts
Patent No.
US 12,739,415
App. No.
18/392,570
Granted
Sep 15, 2026
Kind
B2
Abstract

An image processing device includes an encoder and a decoder. The encoder compresses image data including pixel values of a pixel group in units of pixel groups to generate a bitstream and decompresses the bitstream to generate first restored data. The decoder receives the bitstream from the encoder and decompresses the bitstream to generate second restored data. The encoder includes a first statistic circuit that generates first statistical data based on the first restored data and changes a setting value of the encoder based on the first statistical data, and the decoder includes a second statistic circuit that generates second statistical data based on the second restored data and changes a setting value of the decoder based on the second statistical data.

Claims (71)

1 . An image processing device comprising:

an encoder configured to compress image data including pixel values of a pixel group in units of pixel groups to generate a bitstream and to decompress the bitstream to generate first restored data; and

a decoder configured to receive the bitstream from the encoder and decompress the bitstream to generate second restored data,

wherein the encoder comprises a first statistic circuit configured to generate first statistical data based on the first restored data and change a setting value of the encoder based on the first statistical data,

wherein the decoder comprises a second statistic circuit configured to generate second statistical data based on the second restored data and change a setting value of the decoder based on the second statistical data,

wherein the image sensor further comprises firmware configured to generate a first configuration parameter that corresponds to the setting value of the encoder by performing an arithmetic operation based on the first statistical data,

wherein the encoder further comprises:

a first advanced peripheral bus (APB) interface configured to receive the first configuration parameter from the firmware and transmit the first configuration parameter to at least one encoder register of the encoder,

a first parameter generation circuit configured to receive the first statistical data from the first statistic circuit and generate a second configuration parameter that corresponds to the setting value of the encoder by performing the arithmetic operation based on the first statistical data; and

a first multiplexer configured to receive the first configuration parameter from the first APB interface and receive the second configuration parameter from the first parameter generation circuit, select one of the first configuration parameter and the second configuration parameter, and transmit one of the first configuration parameter and the second configuration parameter that is selected to the at least one encoder register, such that the at least one encoder register changes the setting value of the encoder to the one of the first configuration parameter and the second configuration parameter that is selected.

2 . The image processing device of claim 1 , wherein the first statistic circuit comprises:

a first reading circuit configured to generate first accumulated restored data by accumulating a plurality of pixel values of the first restored data;

a first calculation circuit comprising a first arithmetic operation circuit configured to generate the first statistical data by performing the arithmetic operation based on the first accumulated restored data; and

a first buffer configured to store the first statistical data generated by the first calculation circuit.

3 . The image processing device of claim 2 , wherein the second statistic circuit comprises:

a second reading circuit configured to generate second accumulated restored data by accumulating a plurality of pixel values of the second restored data;

a second calculation circuit comprising a second arithmetic operation circuit configured to generate the second statistical data by performing the arithmetic operation based on the second accumulated restored data; and

a second buffer configured to store the second statistical data generated by the second calculation circuit.

4 . The image processing device of claim 2 , wherein the first reading circuit comprises:

a storage circuit configured to store a plurality of pixel values of the first accumulated restored data; and

an adding circuit configured to receive the plurality of pixel values of the first accumulated restored data from the storage circuit and perform an addition operation on the plurality of pixel values of the first accumulated restored data and the plurality of pixel values of the first restored data to generate the first accumulated restored data.

5 . The image processing device of claim 2 , wherein the encoder further comprises a memory that stores the first restored data,

the first reading circuit comprises:

an accumulator configured to generate the first accumulated restored data; and

a memory controller configured to generate a control signal to control the memory to output particular restored data from the first restored data stored in the memory, and

the memory transmits the particular restored data to the accumulator of the first reading circuit based on the control signal.

6 . The image processing device of claim 2 , wherein the first statistical data comprises at least one of luminance information, direction information, or sensitivity information of the image data.

7 . The image processing device of claim 2 , wherein the first statistic circuit further comprises a calculation circuit controller configured to control a size of the first accumulated restored data received by the first arithmetic operation circuit.

8 . The image processing device of claim 7 , wherein the calculation circuit controller comprises:

a line counter configured to measure a number of lines of the first accumulated restored data and to control the size of the first accumulated restored data based on the number of lines; and

a state circuit configured to control at least one of an operation start time or an operation end time of the first arithmetic operation circuit.

9 . The image processing device of claim 1 , wherein the at least one encoder register changes the setting value of the encoder to the one of the first configuration parameter and the second configuration parameter from the first multiplexer.

10 . A method of operating an image processing device that synchronizes an encoder and a decoder each having a statistic circuit, the method comprising:

generating, by the statistic circuit in each of the encoder and the decoder, corresponding statistical data by performing a same arithmetic operation based on corresponding restored data; and

simultaneously updating a setting value of the encoder and a setting value of the decoder based on the corresponding statistical data,

wherein the generating by the statistic circuit in the encoder comprises:

generating, by firmware, a first configuration parameter that corresponds to the setting value of the encoder by performing the arithmetic operation based on the corresponding statistical data that corresponds to the encoder,

receiving, by a first advanced peripheral bus (APB) interface, the first configuration parameter from the firmware and transmitting the first configuration parameter to at least one encoder register of the encoder, such that the at least one encoder register changes the setting value of the encoder to the first configuration parameter that corresponds to the setting value of the encoder,

receiving, by a first parameter generation circuit in the encoder, the corresponding statistical data from the statistic circuit of the encoder and generating a second configuration parameter that corresponds to the setting value of the encoder by performing the arithmetic operation based on the corresponding statistical data that corresponds to the encoder; and

receiving, by a multiplexer of the encoder, the first configuration parameter from the first APB interface and receiving the second configuration parameter from the first parameter generation circuit, selecting one of the first configuration parameter and the second configuration parameter, and transmitting one of the first configuration parameter and the second configuration parameter that is selected to the at least one encoder register.

11 . The method of claim 10 , wherein the generating comprises, by the statistic circuit of each of the encoder and the decoder:

generating corresponding accumulated restored data by accumulating the corresponding restored data; and

generating the corresponding statistical data by performing the same arithmetic operation on the corresponding accumulated restored data.

12 . The method of claim 11 , wherein the generating of the corresponding statistical data by performing the same arithmetic operation on the corresponding accumulated restored data comprises:

measuring a number of lines of the corresponding accumulated restored data;

determining a size of the corresponding accumulated restored data based on the number of lines; and

generating the corresponding statistical data by performing the same arithmetic operation based on the size of the corresponding accumulated restored data.

13 . An electronic device comprising:

an image sensor comprising a pixel array, the image sensor configured to output image data;

an image signal processor comprising an encoder configured to compress the image data to generate a bitstream and to decompress the bitstream to generate first restored data;

wherein the encoder comprises:

a first statistic circuit configured to generate first statistical data by performing an arithmetic operation based on the first restored data; and

a first parameter generation circuit configured to generate a first configuration parameter that corresponds to a setting value of the encoder by performing the arithmetic operation based on the first statistical data, and

wherein the setting value of the encoder is changed based on the first configuration parameter,

wherein the first statistic circuit comprises:

a first reading circuit configured to generate first accumulated restored data by accumulating a plurality of pixel values of the first restored data;

a first calculation circuit configured to generate the first statistical data by performing the arithmetic operation based on the first accumulated restored data; and

a first buffer configured to store the first statistical data generated by the first calculation circuit, and

wherein the electronic device further comprises firmware configured to generate a second configuration parameter corresponding to the setting value of the encoder,

wherein the encoder further comprises a first multiplexer configured to transmit one of the first configuration parameter and the second configuration parameter to a register of the encoder, and

the register of the encoder changes the setting value of the encoder according to the one of the first configuration parameter and the second configuration parameter.

14 . The electronic device of claim 13 , further comprising:

an application processor comprising a decoder configured to receive the bitstream from the encoder and decompress the bitstream to generate second restored data,

wherein the decoder comprises:

a second statistic circuit configured to generate second statistical data by performing the arithmetic operation based on the second restored data; and

a second parameter generation circuit configured to generate the second configuration parameter that corresponds to a setting value of the decoder by performing the arithmetic operation based on the second statistical data, and

wherein the setting value of the decoder is changed based on the second configuration parameter.

15 . The electronic device of claim 14 , wherein the second statistic circuit comprises:

a second reading circuit configured to generate second accumulated restored data by accumulating a plurality of pixel values of the second restored data;

a second calculation circuit configured to generate the second statistical data by performing the arithmetic operation based on the second accumulated restored data; and

a second buffer configured to store the second statistical data generated by the second calculation circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2023
From: LEE, WONSEOK; KIM, KYUNGIL
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 065932/0621 →
Priority Claims (2)
KR 10-2022-0184943 · Dec 26, 2022 · national
KR 10-2023-0061259 · May 11, 2023 · national
Continuity (1)
Related Publication 20240214593A1 · Jun 27, 2024
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