IP Library Granted Patent US 12,210,809
Granted Patent B2
US 12,210,809 · App. 18/399,429 · Granted Jan 28, 2025

Methods and systems for printed circuit board component placement and approval

Inventors: Curtis Hunter (Kitchener, CA); David Workman (Kitchener, CA)
Assignee: Boardera Software Inc.
G06F30/31G06F30/392H05K3/0005G06F2115/12H05K13/0015
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,210,809
App. No.
18/399,429
Granted
Jan 28, 2025
Kind
B2
Abstract

An aspect of the disclosed embodiments is a method for printed circuit board (PCB) component placement comprising: graphically displaying, on a display device, PCB design features of a PCB design; and providing a user interface control for designating one or more of the PCB design features as electrical contacts for a first selected electrical component. Other aspects are disclosed.

Claims (37)

1. A method for printed circuit board (PCB) component placement comprising:

receiving one or more electronic PCB design files defining a PCB design;

processing the one or more electronic PCB design files to determine which PCB design features of the PCB design are electrical contact features;

processing electrical contact features to determine a subset of the electrical contact features that could together register with a footprint of a first electrical component;

determining an X-Y position and an orientation for the footprint that would cause the footprint to register with the subset of the electrical contact features; and

generating XYRS data for the first electrical component based on the determined X-Y position and orientation of the footprint.

2. The method of claim 1 , comprising:

prior to automatically generating the XYRS data, providing a user interface control for associating an electrical contact feature in the subset of the electrical contact features with a first electrical lead of the first electrical component.

3. The method of claim 2 , wherein the determined X-Y position and orientation for the footprint of the first electrical component would also cause the electrical contact feature associated with the first electrical lead of the first electrical component to register with a portion of the footprint that corresponds to the first electrical lead.

4. The method of claim 1 , comprising:

processing the one or more electronic PCB design files to estimate a region of the PCB design in which the first electrical component is to be placed, wherein processing electrical contact features to determine a subset of the electrical contact features that could together register with the footprint of the first electrical component comprises processing electrical contact features only within the region to determine a subset of the electrical contact features in the region that could together register with a footprint of the first electrical component.

5. A system for printed circuit board (PCB) component placement comprising:

a user interface provided on a display device for receiving one or more electronic PCB design files defining a PCB design; and

at least one processor executing:

a contact process for processing the one or more electronic PCB design files to determine which PCB design features of the PCB design are electrical contact features;

a cluster process for processing electrical contact features to determine a subset of the electrical contact features that could together register with a footprint of a first electrical component; and

a location process for:

determining an X-Y position and an orientation for the footprint that would cause the footprint to register with the subset of the electrical contact features; and

generating XYRS data for the first electrical component based on the determined X-Y position and orientation of the footprint.

6. The system of claim 5 , comprising:

a user interface control for associating an electrical contact feature in the subset of the electrical contact features with a first electrical lead of the first electrical component.

7. The system of claim 6 , wherein the determined X-Y position and orientation for the footprint of the first electrical component would also cause the electrical contact feature associated with the first electrical lead of the first electrical component to register with a portion of the footprint that corresponds to the first electrical lead.

8. The system of claim 5 , wherein the at least one processor executes:

a region estimator for processing the one or more electronic PCB design files to estimate a region of the PCB design in which the first electrical component is to be placed;

wherein the cluster process for processing electrical contact features to determine a subset of the electrical contact features that could together register with the footprint of the first electrical component processes electrical contact features only within the region to determine a subset of the electrical contact features in the region that could together register with a footprint of the first electrical component.

9. A non-transitory computer readable medium embodying a computer program executable on at least one processor for printed circuit board (PCB) component placement, the computer program comprising:

computer program code for receiving one or more electronic PCB design files defining a PCB design;

computer program code for processing the one or more electronic PCB design files to determine which PCB design features of the PCB design are electrical contact features;

computer program code for processing electrical contact features to determine a subset of the electrical contact features that could together register with a footprint of a first electrical component;

computer program code for determining an X-Y position and an orientation for the footprint that would cause the footprint to register with the subset of the electrical contact features; and

computer program code for generating XYRS data for the first electrical component based on the determined X-Y position and orientation of the footprint.

10. The non-transitory computer readable medium of claim 9 , comprising:

computer program code for providing a user interface control for associating an electrical contact feature in the subset of the electrical contact features with a first electrical lead of the first electrical component.

11. The non-transitory computer readable medium of claim 10 , wherein the determined X-Y position and orientation for the footprint of the first electrical component would also cause the electrical contact feature associated with the first electrical lead of the first electrical component to register with a portion of the footprint that corresponds to the first electrical lead.

12. The non-transitory computer readable medium of claim 9 , comprising:

computer program code for processing the one or more electronic PCB design files to estimate a region of the PCB design in which the first electrical component is to be placed;

wherein processing electrical contact features to determine a subset of the electrical contact features that could together register with the footprint of the first electrical component comprises processing electrical contact features only within the region to determine a subset of the electrical contact features in the region that could together register with a footprint of the first electrical component.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2023
From: HUNTER, CURTIS, MR.; WORKMAN, DAVID, MR.
To: BOARDERA SOFTWARE INC.
Reel/Frame 065976/0001 →
Continuity (2)
Continuation 17485634 · Sep 27, 2021
Related Publication 20240126962A1 · Apr 18, 2024
References Cited (21)
US 5109320A · Bourdelaise · 1992 [cited by examiner]
US 5266747A · Gheorghiu · 1993 [cited by examiner]
US 5608638A · Tain · 1997 [cited by examiner]
US 6938227B2 · Murphy · 2005 [cited by examiner]
US 7627838B2 · Keswick · 2009 [cited by examiner]
US 9268895B2 · Perry · 2016 [cited by examiner]
US 9323880B2 · Madananth · 2016 [cited by applicant]
US 9411923B2 · Kruberg · 2016 [cited by examiner]
US 10089429B2 · Hirschman · 2018 [cited by examiner]
US 10255401B2 · Meng · 2019 [cited by examiner]
US 10289796B2 · Rossi · 2019 [cited by applicant]
US 10339263B2 · Jiang · 2019 [cited by applicant]
US 10445459B1 · Tatara · 2019 [cited by applicant]
US 10592704B2 · Brookshire · 2020 [cited by examiner]
US 10860776B1 · To · 2020 [cited by examiner]
US 11449654B1 · Warren · 2022 [cited by examiner]
US 11900033B2 · Hunter · 2024 [cited by applicant]
US 20150135157A1 · Lin · 2015 [cited by examiner]
US 20220012405A1 · Oron · 2022 [cited by applicant]
US 20220135157A1 · Jones · 2022 [cited by examiner]
US 20230018768A1 · Hunter · 2023 [cited by applicant]