IP Library › Granted Patent US 12,461,837
Granted Patent B2
US 12,461,837 · App. 18/404,870 · Granted Nov 4, 2025

Handshaking method and data storage system

Inventor: Shih-Hsiang Shen (Zhubei, TW)
Assignee: SILICON MOTION, INC.
G06F11/27G06F11/2268G06F11/263G06F13/1673
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Quick Facts
Patent No.
US 12,461,837
App. No.
18/404,870
Granted
Nov 4, 2025
Kind
B2
Abstract

Disclosed is a handshaking method applied to a data storage system including a host system and a data storage device. The handshaking method includes the following steps: applying for a host memory buffer from the host system by the data storage device; transmitting, by the host system, a command descriptor to the host memory buffer, so that the data storage device performs standalone behavior based on the command descriptor in the host memory buffer, and transmits an operation log corresponding to the standalone behavior to the host memory buffer; and continuously monitoring, by the host system, the host memory buffer until the data storage device completes the standalone behavior and transmits a response descriptor to the host memory buffer. Therefore, the host memory buffer is used as a communication interface between the host system and the data storage device, so that the data storage device can perform more diverse operations.

Claims (17)

1 . A handshaking method applied to a data storage system, the data storage system comprising a host system and a data storage device, the handshaking method comprising the following steps:

(A) applying for a host memory buffer from the host system by the data storage device;

(B) transmitting, by the host system, a command descriptor to the host memory buffer, so that the data storage device performs standalone behavior based on the command descriptor in the host memory buffer, and transmits an operation log corresponding to the standalone behavior to the host memory buffer; and

(C) continuously monitoring, by the host system, the host memory buffer until the data storage device completes the standalone behavior and transmits a response descriptor to the host memory buffer.

2 . The handshaking method according to claim 1 , wherein the host memory buffer comprises a command buffer, a log buffer and a response buffer; step (B) comprises: transmitting, by the host system, the command descriptor to the command buffer; and performing, by the data storage device, the standalone behavior based on the command descriptor in the command buffer, generating a corresponding operation log, and transmitting the operation log to the log buffer; and step (C) comprises: continuously monitoring, by the host system, the log buffer; transmitting, by the data storage device, the response descriptor to the response buffer after completing the standalone behavior; and stopping, by the host system, monitoring the log buffer when the response buffer is filled with the response descriptor.

3 . The handshaking method according to claim 1 , wherein the host memory buffer comprises a command buffer, a log buffer, and a response buffer; step (B) comprises: transmitting, by the host system, a test command to the command buffer; and executing, by the data storage device, a self-test operation after extracting a test command in the command buffer, generating test information, and transmitting the test information to the log buffer; and step (C) comprises: continuously monitoring, by the host system, the log buffer; updating, by the data storage device, a test result in the response buffer after completing the self-test operation; and stopping, by the host system, monitoring the log buffer when the test result is updated.

4 . The handshaking method according to claim 1 , wherein step (A) comprises: requesting, by the data storage device, the host system to allocate the host memory buffer in a dynamic random access memory to the data storage device through a peripheral component interconnect express (PCIe) interface according to a non-volatile memory express (NVMe) protocol.

5 . The handshaking method according to claim 1 , wherein the data storage system further comprises a bridge device coupling with the data storage device and the host system; the data storage device comprises a first transmission interface, the host system comprises a second transmission interface, the second transmission interface is coupled to the host memory buffer, and a communication protocol corresponding to the first transmission interface is different from a communication protocol corresponding to the second transmission interface; step (A) comprises: applying for, by the data storage device, the host memory buffer to the host system through the first transmission interface via the bridging device and the second transmission interface; step (B) comprises: transmitting, by the host system, the command descriptor to the host memory buffer, so that the data storage device performs the standalone behavior after extracting the command descriptor in the host memory buffer through the first transmission interface via the bridge device and the second transmission interface, and transmits the corresponding operation log to the host memory buffer through the first transmission interface via the bridging device and the second transmission interface; and step (C) comprises: continuously monitoring, by the host system, the host memory until the data storage device completes the standalone behavior and transmits the response descriptor to the host memory buffer through the first transmission interface via the bridging device and the second transmission interface.

6 . A data storage system, comprising:

a host system configured to transmit a command descriptor to a host memory buffer, and continuously monitor the host memory buffer until the host memory buffer is filled with a response descriptor; and

a data storage device coupled to the host system, and configured to apply for the host memory buffer from the host system, perform standalone behavior based on the command descriptor in the host memory buffer, and then transmit an operation log correspondingly generated to the host memory buffer, and transmit the response descriptor to the host memory buffer after completing the standalone behavior.

7 . The data storage system according to claim 6 , wherein the host memory buffer comprises a command buffer, a log buffer and a response buffer; the host system is further configured to transmit the command descriptor to the command buffer, and continuously monitor the log buffer until the response buffer is filled with the response descriptor; the data storage device is further configured to perform the standalone behavior based on the command descriptor in the command buffer, generate the operation log corresponding thereto, transmit the operation log to the log buffer, and transmit the response descriptor to the response buffer after completing the standalone behavior.

8 . The data storage system according to claim 6 , wherein the host memory buffer comprises a command buffer, a log buffer, and a response buffer; the host system is further configured to transmit a test command to the command buffer, and continuously monitor the log buffer until a test result of the response buffer is updated; the data storage device is further configured to execute a self-test operation after extracting the test command in the command buffer, generate test information, and transmit the test information to the log buffer, and update the test result in the response buffer after the self-test operation is completed.

9 . The data storage system according to claim 8 , wherein the self-test operation is a NAND flash test or a memory test.

10 . The data storage system according to claim 6 , wherein the data storage device is further configured to request the host system to allocate the host memory buffer in a dynamic random access memory to the data storage device through a peripheral component interconnect express (PCIe) interface according to a non-volatile memory express (NVMe) protocol.

11 . The data storage system according to claim 6 , wherein the data storage system further comprises a bridge device coupling with the data storage device and the host system; the data storage device comprises a first transmission interface, the host system comprises a second transmission interface, the second transmission interface is coupled to the host memory buffer, and a communication protocol corresponding to the first transmission interface is different from a communication protocol corresponding to the second transmission interface; the data storage device is further configured to communicate with the host system with the second transmission interface via the bridge device through the first transmission interface, and access the host memory buffer.

12 . The data storage system according to claim 11 , wherein the first transmission interface is a universal flash storage (UFS) interface, and the second transmission interface is a PCIe interface or a universal serial bus (USB) interface.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 4, 2024
From: SHEN, SHIH-HSIANG
To: SILICON MOTION, INC.
Reel/Frame 066207/0087 →
Continuity (1)
Related Publication 20240354212A1 · Oct 24, 2024
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