IP Library › Granted Patent US 12,506,988
Granted Patent B2
US 12,506,988 · App. 18/418,992 · Granted Dec 23, 2025

Dynamic vision sensor with bias variation circuit, image signal processor and application processor

Inventors: Junseok Kim (Suwon-si, KR); Jiwon Im (Suwon-si, KR); Junhyuk Park (Suwon-si, KR)
Assignee: Samsung Electronics Co., Ltd.
H04N25/77H04N25/709
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Quick Facts
Patent No.
US 12,506,988
App. No.
18/418,992
Granted
Dec 23, 2025
Kind
B2
Abstract

Disclosed is a dynamic vision sensor. The dynamic vision sensor includes a photodiode configured to generate a first photodiode current in response to a change in light due to a movement of an object, a first transistor; a first node connected to the photodiode and the first transistor; a second node connected to the first transistor and being configured to receive a first voltage and receive a second voltage, a ground, a second transistor connected to the first node and the ground, a third node connected to the first transistor and the second transistor, and a current source connected to the third node, wherein the first voltage has a first level and the second voltage has a second level different from the first level.

Claims (43)

1 . A dynamic vision sensor (DVS) comprising:

a photodiode configured to generate a first photodiode current in response to a change in light due to a movement of an object;

a first transistor;

a first node connected to the photodiode and the first transistor;

a second node connected to the first transistor and being configured to receive a first voltage and receive a second voltage;

a ground;

a second transistor connected to the first node and the ground;

a third node connected to the first transistor and the second transistor; and

a current source connected to the third node,

wherein the first voltage has a first level and the second voltage has a second level different from the first level.

2 . The dynamic vision sensor of claim 1 , wherein the third node is connected to a gate of the first transistor, and

wherein the first node is connected to a gate of the second transistor.

3 . The dynamic vision sensor of claim 2 , wherein the photodiode is configured to generate a second photodiode current in response to the first voltage.

4 . The dynamic vision sensor of claim 3 , wherein the photodiode is configured to generate a third photodiode current in response to the second voltage.

5 . The dynamic vision sensor of claim 3 , wherein the second node is configured to receive a third voltage, and

wherein the third voltage has a third level different from at least one of the first level and the second level.

6 . The dynamic vision sensor of claim 3 , wherein the second node is configured to receive the first voltage and the second voltage alternately.

7 . The dynamic vision sensor of claim 3 , wherein the second node is configured to receive the first voltage from a bias variation circuit located in a first chip package different from a second chip package in which the photodiode is located.

8 . The dynamic vision sensor of claim 3 , wherein the second node is configured to receive the first voltage from a bias variation circuit, and

wherein the bias variation circuit and the photodiode are located in a single chip package.

9 . The dynamic vision sensor of claim 8 , wherein the current source is configured to receive a fourth voltage from the bias variation circuit.

10 . The dynamic vision sensor of claim 9 , wherein the current source is configured to receive a fifth voltage from the bias variation circuit.

11 . The dynamic vision sensor of claim 8 , wherein the bias variation circuit is configured to supply the first and second voltage to the second node based on a bias variation enable signal.

12 . The dynamic vision sensor of claim 8 , wherein the bias variation circuit is configured not to supply the first voltage and second voltage to the second node based on a bias variation disable signal.

13 . A dynamic vision sensor (DVS) comprising:

a photodiode configured to generate a first photodiode current in response to a change in light due to a movement of an object;

a first transistor;

a first node connected to the photodiode and the first transistor;

a second node connected to the first transistor;

a ground;

a second transistor connected to the first node and the ground;

a third node connected to the first transistor and the second transistor; and

a current source connected to the third node and configured to receive a first voltage and a second voltage,

wherein the first voltage has a first level and the second voltage has a second level different from the first level.

14 . The dynamic vision sensor of claim 13 , wherein the third node is connected to a gate of the first transistor, and

wherein the first node is connected to a gate of the second transistor.

15 . The dynamic vision sensor of claim 14 , wherein the photodiode configured to generate a second photodiode current in response to the first voltage.

16 . The dynamic vision sensor of claim 15 , wherein the photodiode is configured to generate a third photodiode current in response to the second voltage.

17 . The dynamic vision sensor of claim 15 , wherein the current source is configured to receive a third voltage having a third level different from at least one of the first level and second level.

18 . The dynamic vision sensor of claim 15 , wherein the current source is configured to receive the first voltage and the second voltage alternately.

19 . The dynamic vision sensor of claim 15 , wherein the second node is configured to receive the first voltage from a bias variation circuit located in a first chip package different from a second chip package in which the photodiode is located.

20 . The dynamic vision sensor of claim 15 , wherein the second node is configured to receive the first voltage from a bias variation circuit, and

wherein the bias variation circuit and the photodiode are located in a single chip package.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 23, 2024
From: KIM, JUNSEOK; IM, JIWON; PARK, JUNHYUK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 066217/0216 →
Priority Claims (1)
KR 10-2023-0091355 · Jul 13, 2023 · national
Continuity (1)
Related Publication 20250024173A1 · Jan 16, 2025
References Cited (10)
US 10909824B2 · Yaffe · 2021 [cited by examiner]
US 11825229B2 · Brnadli · 2023 [cited by examiner]
US 20150285625A1 · Deane · 2015 [cited by examiner]
US 20170237914A1 · Cho · 2017 [cited by examiner]
US 20180191972A1 · Berner · 2018 [cited by examiner]
US 20200058205A1 · Yaffe et al. · 2020 [cited by applicant]
US 20220224856A1 · Brändli et al. · 2022 [cited by applicant]
CN 111770245A · 2020 [cited by applicant]
CN 114222034A · 2022 [cited by applicant]
KR 1020200019558A · 2020 [cited by applicant]