IP Library Granted Patent US 12,314,611
Granted Patent B2
US 12,314,611 · App. 18/431,790 · Granted May 27, 2025

Logical memory addressing for network devices

Inventors: Alex Markuze (Rosh HaAyin, IL); Shay Vargaftik (Herzliya, IL); Igor Golikov (Herzliya, IL); Yaniv Ben-Itzhak (Herzliya, IL); Avishay Yanai (Herzliya, IL)
Assignee: VMWare LLC
G06F3/067G06F3/0604G06F3/0655
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Quick Facts
Patent No.
US 12,314,611
App. No.
18/431,790
Granted
May 27, 2025
Kind
B2
Abstract

Some embodiments provide a method for, at a network interface controller (NIC) of a computer, accessing data in a network. From the computer, the method receives a request to access data stored at a logical memory address. The method translates the logical memory address into a memory address of a particular network device storing the requested data. The method sends a data message to the particular network device to retrieve the requested data.

Claims (41)

1. A method for accessing data in a network, the method comprising:

receiving, by a network controller (NIC), a first set of configuration data from a first network device for translating logical memory addresses into memory addresses of the first network device;

receiving a request to access data stored at a logical memory address;

translating the logical memory address into a memory address of the first network device that stores the requested data using a translation table;

replacing, by a second network device replaces, the first network device in a storage network after sending a data message to retrieve the request data; and

receiving a second set of configuration data from a second network device for translating the logical memory addresses into memory addresses of the second network device, wherein the first network device is shut down after a grace period that allows for the NIC and NICs of other computers to update configuration data for translating logical memory addresses.

2. The method of claim 1 , wherein the request is received from a client process executed by a processing unit of the computer.

3. The method of claim 2 , wherein modifications to a location of the data in the network are transparent to the client process.

4. The method of claim 1 , wherein the request is a first request and the logical memory address is a first logical memory address, the method further comprising:

from the computer, receiving a second request to access data stored at a second logical memory address;

translating the second logical memory address into a memory address of a local memory of the computer; and

reading the requested data from the local memory using the translated memory address.

5. The method of claim 1 , wherein translating the logical memory address comprises determining a network address for the particular network device and a logical block address for reading data at a specific memory location of the particular network device.

6. The method of claim 5 , wherein the network address is used to send the data message to the particular network device.

7. The method of claim 1 , wherein the data message is a non-volatile memory express (NVMe) over fabric data message.

8. The method of claim 1 further comprising:

receiving a set of data messages from the particular network device conveying the requested data; and

providing the requested data to the computer.

9. The method of claim 1 , wherein the data message is sent to the first network device.

10. The method of claim 1 further comprising receiving configuration data from a plurality of respective network devices for translating respective sets of logical memory addresses into memory addresses of the respective network devices.

11. The method of claim 1 further comprising updating the translation table.

12. The method of claim 11 , further comprising detecting a network change cause updating the translation table.

13. A network interface controller (NIC) device comprising:

a memory storing a translation table for converting logical memory addresses;

a processor configured to:

receive a first set of configuration data from a first network device for translating logical memory addresses into memory addresses of the first network device;

translate the logical memory address into a memory address of the first network device using the translation table;

send a data message to the first network device to retrieve the requested data, wherein after the sending of the data message a second network device replaces the first network device in a storage network; and

receiving a second set of configuration data from a second network device for translating the logical memory addresses into memory addresses of the second network device, wherein the first network device is shut down after a grace period that allows for the NIC and NICs of other computers to update configuration data for translating logical memory addresses.

14. The device of claim 13 , wherein the request is received from a client process executed by a processing unit of the computer, wherein modifications to a location of the data in the network are transparent to the client process.

15. The device of claim 13 , wherein the request comprises a first request and the logical memory address comprises a first logical memory address, wherein the processor is further configured to:

from a computer, receive a second request to access data stored at a second logical memory address;

translate the second logical memory address into a memory address of a local memory of the computer; and

read the requested data from the local memory using the translated memory address.

16. The device of claim 13 , wherein the processor is further configured to determine a network address for the particular network device and a logical block address for reading data at a specific memory location.

17. The device of claim 16 , wherein the network address is used to send the data message to the particular network device.

18. The device of claim 13 , wherein the processor is further configured to:

receive a set of data messages from the particular network device conveying the requested data; and

provide the requested data to the computer.

19. The device of claim 13 , wherein the processor is further configured to update the translation table.

20. The device of claim 13 , wherein the processor is further configured to process configuration data from a plurality of respective network devices for translating respective sets of logical memory addresses into memory addresses of the respective network devices.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2024
From: MARKUZE, ALEX; VARGAFTIK, SHAY; GOLIKOV, IGOR; BEN-ITZHAK, YANIV; YANAI, AVISHAY
To: VMWARE, INC.
Reel/Frame 068530/0175 →
CHANGE OF NAME Recorded Sep 9, 2024
From: VMWARE, INC.
To: VMWARE LLC
Reel/Frame 068904/0860 →
Continuity (2)
Continuation 17845740 · Jun 21, 2022
Related Publication 20240176551A1 · May 30, 2024
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