Apparatus and method for hardware metering using memory-type camouflaged cell
View Patent ↗Disclosed herein is an apparatus for hardware metering using a memory-type camouflaged cell. The apparatus includes memory including at least one camouflaged memory cell in which a key is hidden by a designer in advance and a controller for controlling whether to block the supply of power to the memory. The controller may perform reading a key from a corresponding key location in the multiple memory cells of the memory based on key location information stored in the controller when a key is input from the outside, determining whether the key input from the outside is the same as the key read from the memory, setting an authentic flag based on the determination result, and performing control based on the set authentic flag such that the memory operates normally or the supply of power is blocked.
1. An apparatus for hardware metering using a memory-type camouflaged cell, comprising:
memory including multiple memory cells, at least one of which is a camouflaged memory cell in which a key is hidden by a designer in advance, the at least one camouflaged memory cell being identified by the designer only; and
a controller configured to control whether to block supply of power to the memory,
wherein the controller is further configured to perform:
reading the hidden key from a key location among the multiple memory cells of the memory based on key location information when a key and the key location information are input from an outside;
determining whether the key input from the outside is identical to the key read from the memory;
setting an authentic flag based on a determination result; and
performing control based on the set authentic flag such that the memory operates normally or such that the supply of power is blocked and the memory is unavailable.
2. The apparatus of claim 1 , wherein the camouflaged memory cell is configured such that an output signal thereof is adjusted based on two or more transistors having different threshold voltages.
3. The apparatus of claim 1 , wherein setting the authentic flag is configured to set the authentic flag to ‘1’ when the key input from the outside is identical to the key read from the hidden memory, and to set the authentic flag to ‘0’ when the key input from the outside is not identical to the hidden key read from the memory.
4. The apparatus of claim 3 , wherein:
the controller is further configured to perform outputting the set authentic flag to the outside, and
performing the control is configured to perform the control such that the memory operates normally through fusing of the memory in response to a request from the outside when the authentic flag is ‘1’.
5. The apparatus of claim 3 , wherein:
performing the control is configured to perform the control such that the supply of power to the memory is blocked when the authentic flag is ‘0’.
6. An apparatus for hardware metering using a memory-type camouflaged cell, comprising:
memory including multiple memory cells, at least one of which is a camouflaged memory cell in which a key is hidden by a designer in advance, the at least one camouflaged memory cell being identified by the designer only and a memory cell in which a message is stored; and
a controller configured to control whether to block supply of power to the memory,
wherein the controller is further configured to perform:
reading the message from the memory based on a message location stored in the controller in advance and outputting the message when a key location is input from an outside;
performing a Hash Message Authentication Code (HMAC) operation based on the message and on the key that is read from the memory based on the key location input from the outside;
in response to an outer HMAC input from the outside, determining whether the outer HMAC is identical to an inner HMAC;
setting an authentic flag based on a determination result; and
performing control based on the set authentic flag such that the memory operates normally or such that the supply of power is blocked and the memory is unavailable.
7. The apparatus of claim 6 , wherein the camouflaged memory cell is configured such that an output signal thereof is adjusted based on two or more transistors having different threshold voltages.
8. The apparatus of claim 6 , wherein the outer HMAC is acquired by performing the HAMC operation using a key and the message that is output to the outside.
9. The apparatus of claim 6 , wherein setting the authentic flag is configured to set the authentic flag to ‘1’ when the outer HMAC is identical to the inner HMAC, and to set the authentic flag to ‘0’ when the outer HMAC is not identical to the inner HMAC.
10. The apparatus of claim 9 , wherein:
the controller is further configured to perform outputting the set authentic flag to the outside, and
performing the control is configured to perform the control such that the memory operates normally through fusing of the memory in response to a request from the outside when the authentic flag is ‘1’.
11. The apparatus of claim 9 , wherein:
performing the control is configured to perform the control such that the supply of power to the memory is blocked when the authentic flag is ‘0’.