SECURE START OF A PROCESSING DEVICE

1 . A method, comprising:

executing, by a processor of a processing device, a boot code to carry out a boot sequence of the processing device;

wherein executing comprises:

performing at least one verification step to verify a proper progress of the boot sequence during execution of the boot code; and

when said at least one verification step identifies an error in proper progress of the boot sequence, storing a status value in a register of the processing device and resetting of the processing device;

wherein the register is accessible in read mode via a debugging interface of the processing device to read the stored status value.

2 . The method according to claim 1 , wherein the status value provides an indication that an error occurred during the verification step.

3 . The method according to claim 1 , wherein the status value is coded over a plurality of bits, and wherein each bit indicates that an error occurred during an associated verification step.

4 . The method according to claim 3 , wherein the boot code is configured, after each verification step, to control programming of a bit associated with that verification step, to a first value when an error has occurred during the verification step.

5 . The method according to claim 1 , wherein the register forms part of a non-volatile memory, the register being accessible in read mode via the debugging interface during the execution of the boot code without other locations in the non-volatile memory being accessible via the debugging interface.

6 . The method according to claim 5 , further comprising:

recovering the status value via the debugging interface; and

debugging, by an external device, of the boot sequence based on the recovered status value.

7 . The method according to claim 6 , wherein recovering the status value occurs during the execution of the boot sequence.

8 . The method according to claim 1 , wherein the processor is in a closed state during the boot sequence.

9 . The method according to claim 1 , wherein performing the at least one verification step comprises performing a verification of an authenticity of one or a plurality of application codes loaded in a first memory location.

10 . The method according to claim 1 , wherein performing the at least one verification step comprises performing a verification of an integrity of one or a plurality of application codes loaded in a first memory location.

11 . The method according to claim 1 , wherein performing the at least one verification step comprises performing a verification of a format of one or a plurality of application codes loaded in a first memory location.

12 . The method according to claim 1 , wherein performing the at least one verification step comprises performing a verification of an authenticity of a format of one or a plurality of installation codes or of updates loaded into a second memory location.

13 . The method according to claim 1 , wherein performing the at least one verification step comprises performing a verification of an integrity of a format of one or a plurality of installation codes or of updates loaded into a second memory location.

14 . The method according to claim 1 , wherein performing the at least one verification step comprises performing a verification of a format of one or a plurality of installation codes or of updates loaded into a second memory location.

15 . The method according to claim 1 , wherein the status value is configured in hexadecimal.

16 . A processing device, comprising:

a processor configured to perform, during the execution of a boot code to carry out a boot sequence of the processing device:

at least one verification step configured to verify a proper progress of the boot sequence during execution of the boot code; and

when said at least one verification step identifies an error in proper progress of the boot sequence, store a status value in a register of the processing device and reset the processing device;

wherein the register is accessible in read mode via a debugging interface of the processing device.

17 . The processing device according to claim 16 , wherein the status value provides an indication that an error occurred during the verification step.

18 . The processing device according to claim 16 , wherein the register forms part of a non-volatile memory, wherein the register is accessible in read mode via the debugging interface during the execution of the boot code without other locations in the non-volatile memory being accessible via the debugging interface.

19 . The processing device according to claim 18 , wherein the register is accessible during the boot sequence via the debugging interface.

20 . The processing device according to claim 16 , wherein the processor is in a closed state during the boot sequence.