SiC substrate and SiC ingot
In a SiC substrate, when resistivities at a plurality of first measurement points that are in a region inside a boundary located 5 mm inward from an outer circumferential end thereof and that include a center and a plurality of measurement points separated by 10 mm from each other in the [11-20] direction or the [−1-120] direction from the center, and at two second measurement points that are located 1 mm inward from the outer circumferential end and located in each of the [11-20] direction from the center and the [−1-120] direction from the center are measured, a difference between the maximum resistivity and the minimum resistivity among the resistivities of each of the plurality of first measurement points and the two second measurement points is 0.5 mΩ·cm or less, and the diameter is 149 mm or more.
1. A SiC substrate,
wherein, when resistivities at a plurality of first measurement points that are in a region inside a boundary located 5 mm inward from an outer circumferential end thereof and that include a center and a plurality of measurement points separated by 10 mm from each other in the [11-20] direction or the [−1-120] direction from the center, and at two second measurement points that are located 1 mm inward from the outer circumferential end and located in each of the [11-20] direction from the center and the [−1-120] direction from the center are measured, a difference between the maximum resistivity and the minimum resistivity among the resistivities of each of the plurality of first measurement points and the two second measurement points is 0.5 mΩ·cm or less, and
the diameter is 149 mm or more.
2. A SiC substrate,
wherein, when resistivities at a plurality of first measurement points that are in a region inside a boundary located 5 mm inward from an outer circumferential end thereof and that include a center and a plurality of measurement points separated by 10 mm from each other in the [11-20] direction or the [−1-120] direction from the center, and at two second measurement points that are located 1 mm inward from the outer circumferential end and located in each of the [11-20] direction from the center and the [−1-120] direction from the center are measured, a difference between the maximum resistivity and the minimum resistivity among the resistivities of each of the plurality of first measurement points and the two second measurement points is 1 mΩ·cm or less, and
the diameter is 199 mm or more.
3. The SiC substrate according to claim 2 ,
wherein the difference between the maximum resistivity and the minimum resistivity among the resistivities of each of the plurality of first measurement points and the two second measurement points is 0.5 mΩ·cm or less.
4. The SiC substrate according to claim 1 ,
wherein the SiC substrate has a region other than a high nitrogen concentration region called a facet.
5. The SiC substrate according to claim 2 ,
wherein the SiC substrate has a region other than a high nitrogen concentration region called a facet.
6. The SiC substrate according to claim 3 ,
wherein the SiC substrate has a region other than a high nitrogen concentration region called a facet.
7. A SiC ingot,
wherein, when a SiC substrate is cut out and resistivities on a cut surface thereof are measured, a difference between the maximum resistivity and the minimum resistivity among resistivities at each of a plurality of first measurement points that are in a region inside a boundary located 5 mm inward from an outer circumferential end and that include a center and a plurality of measurement points separated by 10 mm from each other in the [11-20] direction or the [−1-120] direction from the center, and two second measurement points that are located 1 mm inward from the outer circumferential end and located in each of the [11-20] direction from the center and the [−1-120] direction from the center is 1 mΩ·cm or less, and
a region other than a high nitrogen concentration region called a facet is included.
8. The SiC ingot according to claim 7 ,
wherein the difference between the maximum resistivity and the minimum resistivity among the resistivities of each of the plurality of first measurement points and the two second measurement points is 0.5 mΩ·cm or less.
9. A SiC ingot,
wherein, when a SiC substrate is cut out and resistivities on a cut surface thereof are measured, a difference between the maximum resistivity and the minimum resistivity among resistivities at each of a plurality of first measurement points that are in a region inside a boundary located 5 mm inward from an outer circumferential end and that include a center and a plurality of measurement points separated by 10 mm from each other in the [11-20] direction or the [−1-120] direction from the center, and two second measurement points that are located 1 mm inward from the outer circumferential end and located in each of the [11-20] direction from the center and the [−1-120] direction from the center is 2 mΩ·cm or less,
a region other than a high nitrogen concentration region called a facet is included, and
the diameter is 149 mm or more.
10. The SiC ingot according to claim 9 ,
wherein the difference between the maximum resistivity and the minimum resistivity among the resistivities of each of the plurality of first measurement points and the two second measurement points is 1 mΩ·cm or less.
11. The SiC ingot according to claim 9 ,
wherein the difference between the maximum resistivity and the minimum resistivity among the resistivities of each of the plurality of first measurement points and the two second measurement points is 0.5 mΩ·cm or less.
12. The SiC ingot according to claim 9 ,
wherein the diameter is 199 mm or more.
13. The SiC ingot according to claim 10 ,
wherein the diameter is 199 mm or more.
14. The SiC ingot according to claim 11 ,
wherein the diameter is 199 mm or more.
15. A SiC epitaxial wafer comprising:
the SiC substrate according to claim 1 , and
a SiC epitaxial layer on a surface of the SiC substrate.
16. A SiC epitaxial wafer comprising:
the SiC substrate according to claim 2 , and
a SiC epitaxial layer on a surface of the SiC substrate.
17. A SiC epitaxial wafer comprising:
the SiC substrate according to claim 3 , and
a SiC epitaxial layer on a surface of the SiC substrate.
18. A SiC epitaxial wafer comprising:
the SiC substrate according to claim 4 , and
a SiC epitaxial layer on a surface of the SiC substrate.
19. A SiC epitaxial wafer comprising:
the SiC substrate according to claim 5 , and
a SiC epitaxial layer on a surface of the SiC substrate.
20. A SiC epitaxial wafer comprising:
the SiC substrate according to claim 6 , and
a SiC epitaxial layer on a surface of the SiC substrate.