IP Library › Granted Patent US 12,556,368
Granted Patent B2
US 12,556,368 · App. 18/453,823 · Granted Feb 17, 2026

High throughput data flow for SHA-2 hashing module

Inventors: Silvia Melitta Mueller (St. Ingbert, DE); Manoj Kumar (Yorktown Heights, NY); Niels Fricke (Herrenberg, DE)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H04L9/0643
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,556,368
App. No.
18/453,823
Granted
Feb 17, 2026
Kind
B2
Abstract

Provided are a method, a system, a computer program product, an Application Specific Integrated Circuit, and a cryptographic module, where a partitioning is performed of a SHA-2 state update into three blocks. A set of operations associated with the three blocks are executed in a pipelined manner, where each block feeds back for computation into itself.

Claims (43)

1 . A method, comprising:

partitioning a Secure Hash Algorithm 2 (SHA-2) state update into three blocks,

wherein a SHA-2 hash is performed on an input message;

providing for a calculation round a first 1-cycle loop for computing a first half of working variables (A-D);

providing for the calculation round a second 1-cycle loop for computing a second half of working variables (E-H);

providing for the calculation round a third 1-cycle loop for providing a temporary word; and

repeating computations for a specified total number of calculation rounds, wherein the first 1-cycle loop of a computing cycle (A′) runs concurrently with the second 1-cycle loop of a subsequent computing cycle (E′) and the third 1-cycle loop of a subsequent computing cycle, and wherein each block feeds back computation into itself.

2 . The method of claim 1 , wherein a first feedback loop provides a value of a working variable D to the first 1-cycle loop by referring to the value of a working variable A that precedes the working variable D by 3 cycles.

3 . The method of claim 2 , wherein a second feedback loop provides a value of a working variable H to the second 1-cycle loop by referring to a value of a working variable F that precedes the working variable H by 2 cycles.

4 . A system, comprising:

a memory; and

a processor coupled to the memory, wherein the processor performs operations, the operations comprising:

partitioning a Secure Hash Algorithm 2 (SHA-2) state update into three blocks, wherein a SHA-2 hash is performed on an input message;

providing for a calculation round a first 1-cycle loop for computing a first half of working variables (A-D);

providing for the calculation round a second 1-cycle loop for computing a second half of working variables (E-H);

providing for the calculation round a third 1-cycle loop for providing a temporary word; and

repeating computations for a specified total number of calculation rounds, wherein the first 1-cycle loop of a computing cycle (A′) runs concurrently with the second 1-cycle loop of a subsequent computing cycle (E′) and the third 1-cycle loop of a subsequent computing cycle, and wherein each block feeds back computation into itself.

5 . The system of claim 4 , wherein a first feedback loop provides a value of a working variable D to the first 1-cycle loop by referring to the value of a working variable A that precedes the working variable D by 3 cycles.

6 . The system of claim 5 , wherein a second feedback loop provides a value of a working variable H to the second 1-cycle loop by referring to a value of a working variable F that precedes the working variable H by 2 cycles.

7 . A computer program product, the computer program product comprising a computer readable storage medium having computer readable program code embodied therewith, the computer readable program code when executed is configured to perform operations, the operations comprising:

partitioning a Secure Hash Algorithm 2 (SHA-2) state update into three blocks, wherein a SHA-2 hash is performed on an input message;

providing for a calculation round a first 1-cycle loop for computing a first half of working variables (A-D);

providing for the calculation round a second 1-cycle loop for computing a second half of working variables (E-H);

providing for the calculation round a third 1-cycle loop for providing a temporary word; and

repeating computations for a specified total number of calculation rounds, wherein the first 1-cycle loop of a computing cycle (A′) runs concurrently with the second 1-cycle loop of a subsequent computing cycle (E′) and the third 1-cycle loop of a subsequent computing cycle, and wherein each block feeds back computation into itself.

8 . The computer program product of claim 7 , wherein a first feedback loop provides a value of a working variable D to the first 1-cycle loop by referring to the value of a working variable A that precedes the working variable D by 3 cycles.

9 . The computer program product of claim 8 , wherein a second feedback loop provides a value of a working variable H to the second 1-cycle loop by referring to a value of a working variable F that precedes the working variable H by 2 cycles.

10 . An application specific integrated circuit (ASIC), comprising:

first circuitry configured for partitioning a Secure Hash Algorithm 2 (SHA-2) state update into three blocks, wherein a SHA-2 hash is performed on an input message;

second circuitry configured for providing for a calculation round a first 1-cycle loop for computing a first half of working variables (A-D);

third circuitry configured for providing for the calculation round a second 1-cycle loop for computing a second half of working variables (E-H);

fourth circuitry configured for providing for the calculation round a third 1-cycle loop for providing a temporary word; and

fifth circuitry configured for repeating computations for a specified total number of calculation rounds, wherein the first 1-cycle loop of a computing cycle (A′) runs concurrently with the second 1-cycle loop of a subsequent computing cycle (E′) and the third 1-cycle loop of a subsequent computing cycle, and wherein each block feeds back computation into itself.

11 . The ASIC of claim 10 , wherein a first feedback loop provides a value of a working variable D to the first 1-cycle loop by referring to the value of a working variable A that precedes the working variable D by 3 cycles.

12 . The ASIC of claim 11 , wherein a second feedback loop provides a value of a working variable H to the second 1-cycle loop by referring to a value of a working variable F that precedes the working variable H by 2 cycles.

13 . A cryptographic module, comprising:

first circuitry configured for partitioning a Secure Hash Algorithm 2 (SHA-2) state update into three blocks, wherein a SHA-2 hash is performed on an input message;

second circuitry configured for providing for a calculation round a first 1-cycle loop for computing a first half of working variables (A-D);

third circuitry configured for providing for the calculation round a second 1-cycle loop for computing a second half of working variables (E-H);

fourth circuitry configured for providing for the calculation round a third 1-cycle loop for providing a temporary word; and

fifth circuitry configured for repeating computations for a specified total number of calculation rounds, wherein the first 1-cycle loop of a computing cycle (A′) runs concurrently with the second 1-cycle loop of a subsequent computing cycle (E′) and the third 1-cycle loop of a subsequent computing cycle, and wherein each block feeds back computation into itself.

14 . The cryptographic module of claim 13 , wherein a first feedback loop provides a value of a working variable D to the first 1-cycle loop by referring to the value of a working variable A that precedes the working variable D by 3 cycles.

15 . The cryptographic module of claim 14 , wherein a second feedback loop provides a value of a working variable H to the second 1-cycle loop by referring to a value of a working variable F that precedes the working variable H by 2 cycles.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2023
From: MUELLER, SILVIA MELITTA; KUMAR, MANOJ; FRICKE, NIELS
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 064669/0026 →
Continuity (1)
Related Publication 20250070957A1 · Feb 27, 2025
References Cited (17)
US 8275125B2 · Vijayarangan · 2012 [cited by examiner]
US 9164725B2 · Boersma · 2015 [cited by examiner]
US 10346343B2 · Suresh et al. · 2019 [cited by applicant]
US 10783279B2 · Pedersen et al. · 2020 [cited by applicant]
US 20120128149A1 · Boersma · 2012 [cited by examiner]
US 20140189368A1 · Wolrich · 2014 [cited by examiner]
US 20170147340A1 · Yap · 2017 [cited by examiner]
US 20220376893A1 · Fan et al. · 2022 [cited by applicant]
CN 111064561A · 2020 [cited by applicant]
WO 2025040444A1 · 2025 [cited by applicant]
“Secure Hash Standard (SHS),” US Dept. Commerce, Information Technology Laboratory National Institute of Standards and Technology, Federal Information Processing Standards Publication, FIPS Pub 180-4, Aug. 2015, 36 pp. [cited by applicant]
S. Gulley, et al., “Intel SHA Extensions,” Intel Corporation White Paper, Jul. 2013, 22pp. [cited by applicant]
H. Michail, et al., “Ultra-High Speed SHA-256 Hashing Cryptographic Module for IPSEC Hardware/Software Codesign,”, Proceedings of the International Conference on Security and Cryptography, 2010, pp. 309-313. [cited by applicant]
U.S. Appl. No. 17/884,704, filed Aug. 22, 2023. [cited by applicant]
Z architecture: http://publibfp.dhe.ibm.com/epubs/pdf/a227832c.pdf. [cited by applicant]
International Searching Authority, “Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or Declaration,” Patent Cooperation Treaty, Oct. 25, 2… [cited by applicant]
Martino et al. “SHA-2 Acceleration Meeting the Needs of Emerging Applications: A Comparative Survey”, IEEE, Feb. 7, 2020, pp. 28415-28436, vol. 8. [cited by applicant]