Techniques for stereo on peripheral devices
Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a first peripheral device may receive audio stream packets sniffed from an owner audio stream assigned to a second peripheral device paired with the first peripheral device. The first peripheral device may receive a synchronization message from the second peripheral device that includes an owner packet bitmap that identifies packets in the owner audio stream. The first peripheral device may identify missed packets that the first peripheral device missed from the owner audio stream, based on a result of a comparison of the owner packet bitmap and a sniffer packet bitmap that identifies sniffed audio stream packets. The first peripheral device may transmit a response message indicating the missed packets. Numerous other aspects are described.
1. An apparatus for wireless communication at a first peripheral device, comprising:
one or more memories; and
one or more processors, coupled to the one or more memories, individually or collectively configured to cause the first peripheral device to:
receive audio stream packets sniffed from an owner audio stream assigned to a second peripheral device paired with the first peripheral device;
receive a synchronization message from the second peripheral device that includes an owner packet bitmap that identifies packets in the owner audio stream;
identify missed packets that the first peripheral device missed from the owner audio stream, based at least in part on a result of a comparison of the owner packet bitmap and a sniffer packet bitmap that identifies sniffed audio stream packets;
transmit a response message indicating the missed packets;
wherein the audio stream packets are encrypted, and wherein to receive the audio stream packets, the one or more processors are individually or collectively configured to, for each respective audio stream packet;
increment a counter for the respective audio stream packet; and
decrypt the respective audio stream packet;
wherein the one or more processors are individually or collectively configured to cause the first peripheral device to maintain the counter in association with a nonce that uses a first sequence number for a current packet and a second sequence number for a next packet; and
wherein the one or more processors are individually or collectively configured to cause the first peripheral device to select a key from among a first key for a first counter value of the counter or a second key for a second counter value of the counter in accordance with a sequence number of the respective audio stream packet, and wherein the one or more processors, to decrypt the respective audio stream packet, are individually or collectively configured to decrypt the respective audio stream packet using the selected key.
2. The apparatus of claim 1 , wherein the one or more processors are individually or collectively configured to cause the first peripheral device to receive the missed packets from the second peripheral device.
3. The apparatus of claim 2 , wherein the one or more processors are individually or collectively configured to cause the first peripheral device to transmit one or more acknowledgements for the missed packets received from the second peripheral device.
4. The apparatus of claim 2 , wherein the one or more processors are individually or collectively configured to cause the first peripheral device to, as part of a bidirectional relay session:
transmit the sniffer packet bitmap;
receive, from the second peripheral device, a request for packets missed by the second peripheral device; and
transmit the packets missed by the second peripheral device.
5. The apparatus of claim 2 , wherein reception of the missed packets is associated with a joint relay session where the first peripheral device and the second peripheral device relay missed packets in one or more subevents.
6. The apparatus of claim 1 , wherein the one or more processors are individually or collectively configured to cause the first peripheral device to trigger the receiving of the synchronization message.
7. The apparatus of claim 1 , wherein the one or more processors are individually or collectively configured to cause the first peripheral device to select expected counter values for key selection based at least in part on whether the sequence number matches the second sequence number for the nonce and whether cyclic redundancy check (CRC) information for the respective audio stream packet matches CRC information for a previous audio stream packet.
8. The apparatus of claim 1 , wherein the one or more processors are individually or collectively configured to cause the first peripheral device to select expected counter values for key selection based at least in part on whether the sequence number matches the first sequence number for the nonce and whether a cyclic redundancy check (CRC) passes for the respective audio stream packet and a message integrity code (MIC) check fails for the respective audio stream packet.
9. The apparatus of claim 1 , wherein the one or more processors are individually or collectively configured to cause the first peripheral device to select expected counter values for key selection based at least in part on whether the sequence number matches the second sequence number for the nonce and whether a cyclic redundancy check (CRC) passes for the respective audio stream packet and a message integrity code (MIC) check passes for the respective audio stream packet.
10. The apparatus of claim 1 , wherein the one or more processors are individually or collectively configured to cause the first peripheral device to select expected counter values for key selection based at least in part on whether the sequence number matches the first sequence number for the nonce and whether a cyclic redundancy check (CRC) passes for the respective audio stream packet and a message integrity code (MIC) check passes for the respective audio stream packet.
11. The apparatus of claim 1 , wherein the one or more processors are individually or collectively configured to cause the first peripheral device to select expected counter values for key selection based at least in part on whether the sequence number matches the first sequence number for the nonce and whether a cyclic redundancy check (CRC) fails for the respective audio stream packet.
12. The apparatus of claim 1 , wherein the one or more processors are individually or collectively configured to cause the first peripheral device to select expected counter values for key selection based at least in part on whether the sequence number matches the second sequence number for the nonce and whether a cyclic redundancy check (CRC) fails for the respective audio stream packet.
13. The apparatus of claim 1 , wherein the one or more processors are individually or collectively configured to cause the first peripheral device to relay packets to the second peripheral device with or in place of acknowledgements of packets relayed from the second peripheral device.