IP Library Granted Patent US 12,633,106
Granted Patent B2
US 12,633,106 · App. 18/483,427 · Granted May 19, 2026

Information processing device and information processing method

Inventor: Yutaka Yoshihama (Osaka, JP)
Assignee: Panasonic Automotive Systems Co., Ltd.
G06V10/82G06N3/045G06N3/0464G06V10/764
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Quick Facts
Patent No.
US 12,633,106
App. No.
18/483,427
Granted
May 19, 2026
Kind
B2
Abstract

An information processing device includes: an inferencer that receives an image as an input and performs inference processing using a neural network model on the image received; and a postprocessor that processes result information indicating a result of the inference processing performed by the inferencer to output an output value. The inferencer includes one or more depthwise convolution (DWConv) layers each with a stride of two or more as one or more layers located closest to an input layer among a plurality of layers included in the neural network model.

Claims (30)

1 . An information processing device, comprising:

one or more memories; and

circuitry, coupled to the one or more memories, wherein the circuitry, in operation:

receives an image as an input and performs inference processing using a neural network model on the image received;

processes result information indicating a result of the inference processing; and

outputs an output value based on the processing of the result information,

wherein the neural network model includes a plurality of layers, the plurality of layers including:

a first convolutional layer of the neural network model which receives the image as an input, wherein the first convolutional layer is a depthwise convolution (DWConv) layer having a stride of two or more; and

a convolution (Conv) layer subsequent to the first convolutional layer among the plurality of layers included in the neural network model.

2 . The information processing device according to claim 1 ,

wherein the plurality of layers of the neural network model include one or more Conv layers each with a stride of two or more subsequent to the first convolutional layer among the plurality of layers included in the neural network model.

3 . The information processing device according to claim 1 ,

wherein the circuitry receives a full high-definition image as the image.

4 . The information processing device according to claim 1 ,

wherein the plurality of layers of the neural network model include one or more DWConv layers adjacent to the first convolutional layer among the plurality of layers included in the neural network model.

5 . An information processing method to be performed by an information processing device, the information processing method comprising:

receiving an image as an input and performing inference processing using a neural network model on the image received;

processing result information indicating a result of the inference processing; and

outputting an output value based on the processing of the result information, wherein the neural network model includes a plurality of layers, the plurality of layers including:

a first convolutional layer of the neural network model which receives the image as an input, wherein the first convolutional layer is a depthwise convolution (DWConv) layer having a stride of two or more; and

a convolution (Conv) layer subsequent to the first convolutional layer among the plurality of layers included in the neural network model.

6 . The information processing device according to claim 1 ,

wherein the plurality of layers of the neural network model include one or more DWConv layers each with a stride of one or more subsequent to the Conv layer among the plurality of layers included in the neural network model.

7 . The information processing device according to claim 2 , wherein,

the DWConv layer, in operation, adjusts an image size, and

the one or more Conv layers, in operation, perform inference processing on adjusted image data.

8 . The information processing device according to claim 1 , comprising:

a communication interface coupled to the circuitry, wherein the communication interface, in operation:

receives the image; and

outputs the output value.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 6, 2024
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC AUTOMOTIVE SYSTEMS CO., LTD.
Reel/Frame 068328/0764 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 11, 2024
From: YOSHIHAMA, YUTAKA
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 067068/0564 →
Priority Claims (1)
JP 2022-192249 · Nov 30, 2022 · national
Continuity (1)
Related Publication 20240177472A1 · May 30, 2024
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