Electronic device including display driver circuit adaptively storing image
An example electronic device includes a display panel; a display driver circuit operably coupled to the display panel and including a memory; and a processor operably coupled to the display driver circuit. The processor may be configured to identify a refresh rate; provide, to the display driver circuit, a first signal that indicates storing in the memory one or more images to be provided from the processor for a display on the display panel according to the refresh rate, or provide, to the display driver circuit, a second signal that indicates bypassing to store the one or more images in the memory.
1. An electronic device comprising:
a display panel;
a display driver circuit, operably coupled with the display panel, including a memory; and
a processor, operably coupled with the display driver circuit, configured to:
identify a refresh rate, and
according to the identified refresh rate:
provide, to the display driver circuit, a first signal that indicates storing, in the memory, one or more images to be provided from the processor for a display on the display panel according to the refresh rate; or
provide, to the display driver circuit, a second signal that indicates bypassing to store the one or more images in the memory.
2. The electronic device of claim 1 , wherein the processor is configured to:
provide the first signal to the display driver circuit in response to the refresh rate being lower than a reference refresh rate; and
provide the second signal to the display driver circuit in response to the refresh rate being higher than or equal to the reference refresh rate.
3. The electronic device of claim 2 , wherein each of the first signal and the second signal is provided from the processor through or in a front porch portion of a vertical synchronization signal.
4. The electronic device of claim 2 , wherein the display driver circuit is configured to maintain storing the one or more images in the memory based on the first signal, until obtaining the second signal from the processor.
5. The electronic device of claim 2 , wherein the display driver circuit is configured to maintain bypassing to store the one or more images in the memory based on the second signal, until obtaining the first signal from the processor.
6. The electronic device of claim 2 , wherein the processor is configured to:
provide the first signal to the display driver circuit to execute multiple displays of a single image on the display panel for a time interval that corresponds to the refresh rate lower than the reference refresh rate; and
provide the second signal to the display driver circuit to execute a single display of the single image on the display panel for a time interval that corresponds to the refresh rate higher than or equal to the reference refresh rate.
7. The electronic device of claim 6 , wherein the multiple displays include a first display and a second display subsequent to the first display, and
wherein the display driver circuit is configured to:
execute the first display by displaying the single image obtained from the processor on the display panel and storing the single image in the memory for a portion of the time interval corresponding to the refresh rate lower than the reference refresh rate; and
execute the second display by displaying the single image on the display panel based on scanning the single image stored in the memory for another portion of the time interval corresponding to the refresh rate lower than the reference refresh rate.
8. The electronic device of claim 7 , wherein the display driver circuit is configured to:
bypass executing the second display in an initial time interval among a plurality of time intervals after the first signal is obtained, the plurality of time intervals respectively corresponding to the refresh rate lower than the reference refresh rate; and
execute the second display in each of one or more time intervals subsequent to the initial time interval among the plurality of time intervals.
9. The electronic device of claim 2 , wherein scanning, using the display driver circuit operated based on the first signal, an image in the memory maintained in two or more time intervals respectively corresponding to the refresh rate lower than the reference refresh rate is identified by the display driver circuit among the display driver circuit and the processor.
10. The electronic device of claim 2 , wherein the processor is further configured to provide, to the display driver circuit, the second signal, after a first image is displayed on the display panel based on scanning the first image stored in the memory according to the first signal, and
wherein the display driver circuit is configured to store, independently from the second signal, a second image subsequent to the first image in the memory, the second image obtained from the processor in an initial time interval among a plurality of time intervals after the second signal is obtained.
11. The electronic device of claim 10 , wherein the display driver circuit is configured to bypass, based on the second signal, storing an image in the memory, the image obtained in each of one or more time intervals subsequent to the initial time interval among the plurality of time intervals.
12. The electronic device of claim 2 , wherein the processor is further configured to provide, to the display driver circuit, the second signal, after a first image is displayed on the display panel based on scanning the first image stored in the memory according to the first signal, and
wherein the display driver circuit is configured to:
in response to the second signal, identify a time length in which the first image is maintained on the display panel;
in response to the time length being longer than a reference length, store a second image subsequent to the first image obtained from the processor in an initial time interval among a plurality of time intervals after the second signal is obtained in the memory and display the second image on the display panel by scanning the second image stored in the memory in the initial time interval; and
in response to the time length being shorter than or equal to the reference length, bypass storing the second image in the memory in the initial time interval.
13. The electronic device of claim 2 , wherein the processor is further configured to:
identify an image to be maintained for a time longer than or equal to a reference time on the display panel; and
in response to the image, provide a third signal for the image to the display driver circuit, the third signal indicating to store the image to be provided from the processor for a display on the display panel in the memory.
14. The electronic device of claim 13 , wherein the third signal for the image is provided from the processor through or in a front porch portion of a vertical synchronization signal.
15. The electronic device of claim 13 , wherein an address of the third signal for the image is different from an address of each of the first signal and the second signal.
16. The electronic device of claim 13 , wherein the display driver circuit is configured to:
obtain another image subsequent to the image from the processor, after the third signal is obtained; and
bypass storing the other image in the memory.
17. The electronic device of claim 16 , wherein the display driver circuit is configured to:
in response to the third signal for the image obtained after the first signal is obtained, bypass storing the other image in the memory, by releasing a setting that stores in the memory one or more images obtained from the processor after the image is obtained according to the first signal.
18. The electronic device of claim 2 , wherein the processor is further configured to provide, to the display driver circuit, a fourth signal that indicates bypassing to store in the memory a second image to be provided from the processor for a display on the display panel, after a first image is displayed on the display panel based on scanning the first image stored in the memory according to the first signal, and
wherein the display driver circuit is configured to store the second image in the memory, independently from the fourth signal.
19. The electronic device of claim 18 , wherein the display driver circuit is configured to:
identify a time length in which the first image is maintained on the display panel, in response to the fourth signal;
in response to the time length being longer than a reference length, display on the display panel the second image obtained from the processor in a time interval for the second image, store the second image in the memory in the time interval, and display again on the display panel the second image by scanning the second image stored in the memory in the time interval; and
in response to the time length being shorter than or equal to the reference length, display the second image obtained from the processor on the display panel and bypass storing the second image in the memory in the time interval.
20. The electronic device of claim 2 , wherein the display driver circuit is configured to store in the memory one or more images according to the first signal, while a video mode of display serial interface (DSI) is provided.