Bit-flipping decoder and decoding method based on super node
A bit-flipping (BF) decoder and a decoding method based on a super node, which groups two or more component nodes corresponding to two or more bits in a codeword to generate a super node; and performs a decoding iteration on the super node. The decoding iteration includes: calculating a flipping energy for the super node based on a flipping energy for each of the component nodes and internal checks between the component nodes; and flipping at least one of the two or more bits in the super node upon a determination that the flipping energy for the super node exceeds a bit-flipping threshold.
1. A method of operating a bit-flipping decoder, comprising:
receiving at a receiver of the bit-flipping decoder a codeword;
grouping two or more component nodes corresponding to two or more bits in the codeword to generate a super node; and
performing a decoding iteration on the super node containing the two or more component nodes grouped together,
wherein the decoding iteration includes:
calculating a flipping energy for the super node based on a flipping energy for each of the component nodes and internal checks between the component nodes;
flipping at least one of the two or more bits in the super node containing the two or more component nodes grouped together upon a determination that the flipping energy for the super node exceeds a bit-flipping threshold;
updating, subsequent to the flipping, a first syndrome as a product of the codeword and a parity check matrix; and
declaring a success of the decoding iteration upon a determination that the first syndrome is zero.
2. The method of claim 1 , wherein the two or more component nodes include variable nodes having a low degree less than a set degree.
3. The method of claim 1 , wherein the flipping energy for each of the component nodes is calculated based on, for each component node of a previous decoding iteration, a second syndrome, a hard decision value and a channel output value.
4. The method of claim 3 , wherein the flipping energy for each of the component nodes is calculated based on, for each component node of a previous decoding iteration, a product of the second syndrome and a logical operation of the hard decision value and the channel output value.
5. The method of claim 1 , wherein the flipping threshold is determined based on a total degree of the super node and a number of channel inputs.
6. The method of claim 1 , further comprising:
upon a determination that the first syndrome is not zero,
updating the flipping threshold; and
performing another decoding iteration based on the updated flipping threshold.
7. A method of operating a bit-flipping decoder, comprising:
receiving at a receiver of the bit-flipping decoder a codeword;
partitioning multiple component nodes corresponding to multiple bits in the codeword to generate multiple super nodes, each super node corresponding to two or more component nodes among the multiple component nodes, the two or more component nodes corresponding to two or more bits; and
performing multiple super node decoding iterations on each super node containing the two or more component nodes grouped together,
wherein each of the multiple super node decoding iterations includes:
calculating a flipping energy for each super node based on a flipping energy for each of the two or more component nodes and internal checks between the two or more component nodes;
flipping at least one of the two or more bits in each super node containing the two or more component nodes grouped together upon a determination that the flipping energy for each super node exceeds a bit-flipping threshold;
updating, subsequent to the flipping, a first syndrome as a product of the codeword and a parity check matrix; and
declaring a success of the decoding iteration upon a determination that the first syndrome is zero.
8. The method of claim 7 , wherein each of the two or more component nodes in the multiple super nodes includes variable nodes with a low degree less than a set degree.
9. The method of claim 7 , wherein the flipping energy for each of the two or more component nodes is calculated based on, for each component node of a previous decoding iteration, a second syndrome, a hard decision value and a channel output value.
10. The method of claim 9 , wherein the flipping energy for each of the two or more component nodes is calculated based on, for each component node of a previous decoding iteration, a product of the second syndrome and a logical operation of the hard decision value and the channel output value.
11. The method of claim 7 , wherein the flipping threshold is determined based on a total degree of each super node and a number of channel inputs.
12. The method of claim 7 , further comprising:
upon a determination that the first syndrome is not zero,
updating the flipping threshold; and
performing another decoding iteration based on the updated flipping threshold.
13. The method of claim 7 , wherein the multiple super nodes are differently partitioned to have different number of two or more component nodes, and a number of decoding iterations performed on the super nodes is different.
14. The method of claim 7 , further comprising:
determining whether one decoding iteration of the multiple decoding iterations is one of first and last decoding iterations; and
when it is determined that the one decoding iteration is either of the first and last decoding iterations among of the multiple decoding iterations, performing a single decoding iteration for all component nodes.
15. A decoding system comprising:
a processor and a memory including instructions stored thereupon, wherein the instructions upon execution by the processor cause a bit-flipping decoder to:
receive at a receiver of the bit-flipping decoder a codeword;
group two or more component nodes corresponding to two or more bits in the codeword to generate a super node; and
perform a decoding iteration on the super node containing the two or more component nodes grouped together,
wherein the decoding iteration includes:
calculating a flipping energy for the super node based on a flipping energy for each of the component nodes and internal checks between the component nodes;
flipping at least one of the two or more bits in the super node containing the two or more component nodes grouped together upon a determination that the flipping energy for the super node exceeds a bit-flipping threshold;
updating, subsequent to the flipping, a first syndrome as a product of the codeword and a parity check matrix; and
declaring a success of the decoding iteration upon a determination that the first syndrome is zero.
16. The decoding system of claim 15 , wherein the two or more component nodes include variable nodes with a low degree less than a set degree.
17. The decoding system of claim 15 , wherein the flipping energy for each of the component nodes is calculated based on, for each component node of a previous decoding iteration, a second syndrome, a hard decision value and a channel output value.
18. The decoding system of claim 17 , wherein the flipping energy for each of the component nodes is calculated based on, for each component node of a previous decoding iteration, a product of the second syndrome and a logical operation of the hard decision value and the channel output value.
19. The decoding system of claim 15 , wherein the flipping threshold is determined based on a total degree of the super node and a number of channel inputs.
20. The decoding system of claim 15 , wherein the bit-flipping decoder is configured to perform, upon a determination that the first syndrome is not zero,
updating the flipping threshold; and
performing another decoding iteration based on the updated flipping threshold.