IP Library › Granted Patent US 12,727,443
Granted Patent B2
US 12,727,443 · App. 18/500,662 · Granted Sep 1, 2026

Pattern forming method, semiconductor memory device, and method of manufacturing the same

Inventors: Donghwan Lee (Suwon-si, KR); Kanguk Kim (Suwon-si, KR); Seokhyun Kim (Suwon-si, KR); Wonchul Lee (Suwon-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H10P76/2043H10B12/09H10P50/692H10P50/695
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,727,443
App. No.
18/500,662
Granted
Sep 1, 2026
Kind
B2
Abstract

A method of forming a pattern includes forming an etch target layer over a substrate including a first area and a second area, forming a hardmask structure over the etch target layer, forming a photoresist pattern including a first photoresist pattern including an engraved pattern located in the first area and a second photoresist pattern including an embossed pattern located in the second area, forming an upper hardmask pattern including a plurality of openings, forming a reversible hardmask pattern filling the plurality of openings in the first area, and forming a feature pattern including a first pattern located in the first area and a second pattern located in the second area, wherein the first pattern includes a plurality of island patterns and a dam structure planarly surrounding the plurality of island patterns.

Claims (57)

1 . A method of forming a pattern, the method comprising:

forming an etch target layer over a substrate including a first area and a second area;

forming a hardmask structure comprising a plurality of hardmask layers, over the etch target layer in the first area and the second area;

forming a photoresist layer over the hardmask structure in the first area and the second area;

forming a first photoresist pattern comprising an engraved pattern in the first area and a second photoresist pattern comprising an embossed pattern in the second area from the photoresist layer;

forming, in the first area and the second area, an upper hardmask pattern including a plurality of openings by transferring a shape of the first and second photoresist patterns to an upper hardmask layer;

forming a gap-fill hardmask layer filling the plurality of openings in the first area and the second area;

removing the gap-fill hardmask layer from the first area while maintaining the gap-fill hardmask layer in the second area;

forming a reversible hardmask layer over the first area and the second area;

removing the reversible hardmask layer from the second area to form a reversible hardmask pattern in the first area; and

forming a feature pattern comprising a first pattern in the first area and a second pattern in the second area, by transferring a shape of the reversible hardmask pattern to the etch target layer in the first area and transferring a shape of the upper hardmask pattern to the etch target layer in the second area,

wherein the first pattern comprises a plurality of island patterns and a dam structure surrounding the plurality of island patterns.

2 . The method of claim 1 , wherein the dam structure has a shape and surrounds the first area.

3 . The method of claim 1 , wherein, the dam structure has a tetragonal ring shape and a vertex with a curvature.

4 . The method of claim 1 , wherein the plurality of island patterns are spaced apart from each other and form a regular arrangement, and

the second pattern comprises a plurality of line patterns having a nonuniform width and length and spaced apart from each other with a space of a nonuniform size therebetween.

5 . The method of claim 1 , wherein the forming of the reversible hardmask pattern comprises forming a reversible hardmask layer over the first area by atomic layer deposition (ALD), and wherein

the reversible hardmask layer comprises an oxide.

6 . The method of claim 5 , wherein a thickness of the reversible hardmask pattern is about 30 Å to about 300 Å.

7 . The method of claim 1 , wherein a first pattern density in the first area is greater than a second pattern density in the second area.

8 . The method of claim 1 , wherein the plurality of hardmask layers further comprise a lower hardmask layer and a main hardmask layer arranged between the etch target layer and the upper hardmask layer, and

the lower hardmask layer and the main hardmask layer comprise different materials, where the lower hardmask layer is selected from the group consisting of polysilicon, silicon oxide, silicon nitride, and amorphous carbon.

9 . A method of forming a pattern, the method comprising:

forming an etch target layer over a substrate including a first area and a second area;

forming a hardmask structure comprising a plurality of hardmask layers, over the etch target layer;

forming a first photoresist pattern that is an engraved pattern having a planar shape reverse to a planar shape of a first pattern to be formed in the first area, over the hardmask structure in the first area, and forming a second photoresist pattern that is an embossed pattern having a planar shape the same as a planar shape of a second pattern to be formed in the second area, over the hardmask structure in the second area;

forming a gap-fill hardmask layer over the first area and the second area;

removing the gap-fill hardmask layer from the first area while maintaining the gap-fill hardmask layer in the second area;

forming a reversible hardmask layer over the first area and the second area;

removing the reversible hardmask layer from the second area to form a reversible hardmask pattern in the first area; and

forming the first pattern and the second pattern from the etch target layer by etching the hardmask structure and the etch target layer using respective hardmask patterns in the first area and the second area,

wherein the first pattern comprises a plurality of island patterns and a dam structure planarly surrounding the plurality of island patterns.

10 . The method of claim 9 , wherein the dam structure surrounds the first area and has a vertex with a curvature.

11 . The method of claim 9 , wherein each of an outer surface and an inner surface of the dam structure has an even shape.

12 . The method of claim 9 , wherein an outer surface of the dam structure has an even shape, and

an inner surface of the dam structure has an uneven shape.

13 . The method of claim 9 , wherein the plurality of island patterns each have an upper surface with a circular disc shape and are formed in a honeycomb shape in a horizontal direction.

14 . The method of claim 9 , wherein each of an upper surface and a lower surface of the dam structure is at a same vertical level as an upper surface and a lower surface of the plurality of island patterns.

15 . The method of claim 9 , wherein a distance from the dam structure to the second pattern closest to the dam structure is about 100 nm to about 300 nm.

16 . A method of manufacturing a semiconductor memory device, the method comprising:

forming an etch target layer over a substrate including a memory cell array and a peripheral circuit area;

forming a hardmask structure comprising a plurality of hardmask layers over the etch target layer;

forming a photoresist layer over the hardmask structure;

forming a first photoresist pattern comprising an engraved pattern in the memory cell array, and in which a plurality of holes spaced apart from each other are formed, and a second photoresist pattern comprising an embossed pattern in the peripheral circuit area, and having a shape of a plurality of lines;

forming an upper hardmask pattern including a plurality of openings in the memory cell array and the peripheral circuit area;

forming a gap-fill hardmask layer over the memory cell array and the peripheral circuit area;

removing the gap-fill hardmask layer from the memory cell array while maintaining the gap-fill hardmask layer in the peripheral circuit area;

forming a reversible hardmask layer over the memory cell array and the peripheral circuit area;

removing the reversible hardmask layer from the peripheral circuit area to form a reversible hardmask pattern in the memory cell array; and

forming a plurality of island patterns and a dam structure from the etch target layer in the memory cell array by transferring a shape of the reversible hardmask pattern to the etch target layer, and forming a plurality of line patterns from the etch target layer in the peripheral circuit area by transferring a shape of the upper hardmask pattern to the etch target layer.

17 . The method of claim 16 , wherein the dam structure extends along a side of the memory cell array, surrounds the plurality of island patterns, has a tetragonal ring shape, and has a vertex with a curvature.

18 . The method of claim 16 , wherein the reversible hardmask pattern is formed over the memory cell array and the peripheral circuit area by atomic layer deposition (ALD), and

the reversible hardmask layer comprises an oxide.

19 . The method of claim 16 , further comprising:

forming a gap-fill hardmask pattern filling the plurality of openings of the memory cell array and the peripheral circuit area; and

removing a gap-fill hardmask pattern in the memory cell array.

20 . The method of claim 16 , wherein an upper surface of each of the plurality of island patterns and the dam structure is at a different vertical level than an upper surface of each of the plurality of line patterns.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 2, 2023
From: LEE, DONGHWAN; KIM, KANGUK; KIM, SEOKHYUN; LEE, WONCHUL
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 065438/0558 →
Priority Claims (1)
KR 10-2023-0016262 · Feb 7, 2023 · national
Continuity (1)
Related Publication 20240266170A1 · Aug 8, 2024
References Cited (19)
US 8110506B2 · Min et al. · 2012 [cited by applicant]
US 9318494B2 · Kim et al. · 2016 [cited by applicant]
US 9613821B2 · Kang et al. · 2017 [cited by applicant]
US 9941125B2 · Yang et al. · 2018 [cited by applicant]
US 10134606B2 · Woo et al. · 2018 [cited by applicant]
US 10553429B2 · Ham et al. · 2020 [cited by applicant]
US 10573653B2 · Kim et al. · 2020 [cited by applicant]
US 10593677B2 · Chang et al. · 2020 [cited by applicant]
US 11226552B2 · Ahn et al. · 2022 [cited by applicant]
US 11270885B2 · Lee et al. · 2022 [cited by applicant]
US 11380552B2 · Yoon et al. · 2022 [cited by applicant]
US 20200411318A1 · Lee · 2020 [cited by examiner]
US 20210082924A1 · Seong · 2021 [cited by examiner]
US 20220115383A1 · Yoon et al. · 2022 [cited by applicant]
US 20220238534A1 · Seong et al. · 2022 [cited by applicant]
US 20220293420A1 · Lee et al. · 2022 [cited by applicant]
CN 112151358 · 2020 [cited by applicant]
EP 3982396 · 2022 [cited by applicant]
KR 1020190076683 · 2019 [cited by applicant]