IP Library › Granted Patent US 12,740,251
Granted Patent B2
US 12,740,251 · App. 18/519,128 · Granted Sep 15, 2026

Display apparatus with conductive bank layer and manufacturing method thereof

Inventors: Sewan Son (Yongin-si, KR); Sungho Kim (Yongin-si, KR); Jiseon Lee (Yongin-si, KR); Sugwoo Jung (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
H10K59/122H10K59/1201H10K59/80521
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,740,251
App. No.
18/519,128
Granted
Sep 15, 2026
Kind
B2
Abstract

A display apparatus includes a first sub-pixel electrode, a conductive bank layer including a first opening overlapping the first sub-pixel electrode in a plan view, an insulating layer between a peripheral portion of the first sub-pixel electrode and the conductive bank layer, a first intermediate layer disposed on the first sub-pixel electrode in the first opening of the conductive bank layer, and a first counter electrode disposed on the first intermediate layer in the first opening of the conductive bank layer. The conductive bank layer comprises a first conductive layer, a second conductive layer on the first conductive layer, and a third conductive layer on the second conductive layer. The first counter electrode has a width greater than a width of the first intermediate layer. The first counter electrode is in direct contact with the conductive bank layer.

Claims (47)

1 . A display apparatus comprising:

a first sub-pixel electrode;

a conductive bank layer disposed on the first sub-pixel electrode and defining a first opening overlapping the first sub-pixel electrode in a plan view;

an insulating layer disposed between a peripheral portion of the first sub-pixel electrode and the conductive bank layer;

a first intermediate layer disposed on the first sub-pixel electrode in the first opening of the conductive bank layer; and

a first counter electrode disposed on the first intermediate layer in the first opening of the conductive bank layer, wherein

the conductive bank layer comprises:

a first conductive layer;

a second conductive layer disposed on the first conductive layer; and

a third conductive layer disposed on the second conductive layer, wherein the first opening penetrates the first conductive layer, the second conductive layer, and the third conductive layer,

the first counter electrode has a width greater than a width of the first intermediate layer, and

the first counter electrode is in direct contact with the conductive bank layer.

2 . The display apparatus of claim 1 , wherein an edge of the first intermediate layer is spaced apart from the first conductive layer of the conductive bank layer.

3 . The display apparatus of claim 1 , wherein the third conductive layer includes a tip protruding toward the first opening from a point where a side surface of the second conductive layer meets a bottom surface of the third conductive layer.

4 . The display apparatus of claim 3 , further comprising:

a dummy counter electrode separated from the first counter electrode by the tip,

wherein the first counter electrode and the dummy counter electrode include a same material.

5 . The display apparatus of claim 4 , wherein the dummy counter electrode is in direct contact with an upper surface of the conductive bank layer.

6 . The display apparatus of claim 1 , wherein the first counter electrode is in direct contact with a portion of an upper surface of the first conductive layer from a second point where the upper surface of the first conductive layer meets a side surface of the second conductive layer to an edge of the first conductive layer.

7 . The display apparatus of claim 1 , wherein the first conductive layer and the second conductive layer include different materials.

8 . The display apparatus of claim 7 , wherein the second conductive layer includes at least one of a metal and a conductive ceramic.

9 . The display apparatus of claim 7 , wherein the second conductive layer includes at least one of aluminum, magnesium, molybdenum, tungsten, nickel, magnesium oxide, and titanium nitride.

10 . The display apparatus of claim 7 , wherein the second conductive layer has a structure including a first sub-conductive layer including a metal and a second sub-conductive layer including a conductive ceramic.

11 . A method of manufacturing a display apparatus, the method comprising:

forming a first sub-pixel electrode;

forming a conductive bank layer defining a first opening overlapping the first sub-pixel electrode in a plan view, the conductive bank layer disposed on the first sub-pixel electrode with an insulating layer between a peripheral portion of the first sub-pixel electrode and the conductive bank layer;

forming a first intermediate layer disposed on the first sub-pixel electrode in the first opening;

increasing a temperature of the conductive bank layer; and

forming a first counter electrode disposed on the first intermediate layer in the first opening, wherein

the conductive bank layer comprises:

a first conductive layer;

a second conductive layer disposed on the first conductive layer; and

a third conductive layer disposed on the second conductive layer, wherein the first opening penetrates the first conductive layer, the second conductive layer, and the third conductive layer,

the first counter electrode has a width greater than a width of the first intermediate layer, and

the first counter electrode is in direct contact with the conductive bank layer.

12 . The method of claim 11 , wherein an edge of the first intermediate layer is spaced apart from the first conductive layer of the conductive bank layer.

13 . The method of claim 11 , wherein the forming of the conductive bank layer comprises forming the first opening such that the third conductive layer includes a tip protruding toward the first opening from a point where a side surface of the second conductive layer meets a bottom surface of the third conductive layer.

14 . The method of claim 13 , wherein

the forming of the first counter electrode further comprises forming a dummy counter electrode disposed on the conductive bank layer,

the dummy counter electrode is separated from the first counter electrode by the tip, and

the first counter electrode and the dummy counter electrode include a same material.

15 . The method of claim 14 , wherein the dummy counter electrode is in direct contact with an upper surface of the conductive bank layer.

16 . The method of claim 11 , wherein the first counter electrode is in direct contact with a part of an upper surface of the first conductive layer from a second point where the upper surface of the first conductive layer meets a side surface of the second conductive layer to an edge of the first conductive layer.

17 . The method of claim 11 , wherein the insulating layer includes an inorganic insulating material.

18 . The method of claim 11 , wherein a material of the second conductive layer includes at least one of a metal and a conductive ceramic.

19 . The method of claim 18 , wherein the second conductive layer includes at least one of aluminum, magnesium, molybdenum, tungsten, nickel, a magnesium oxide, and a titanium nitride.

20 . The method of claim 18 , wherein the second conductive layer has a structure including a first sub-conductive layer including a metal; and a second sub-conductive layer including a conductive ceramic.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2023
From: SON, SEWAN; KIM, SUNGHO; LEE, JISEON; JUNG, SUGWOO
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 065662/0153 →
Priority Claims (1)
KR 10-2022-0165101 · Nov 30, 2022 · national
Continuity (1)
Related Publication 20240179958A1 · May 30, 2024
References Cited (15)
US 8334545B2 · Levermore et al. · 2012 [cited by applicant]
US 9577209B2 · Tanada et al. · 2017 [cited by applicant]
US 11257893B2 · Kim et al. · 2022 [cited by applicant]
US 11489023B2 · Son et al. · 2022 [cited by applicant]
US 11563074B2 · Cho et al. · 2023 [cited by applicant]
US 20140183479A1 · Park · 2014 [cited by examiner]
US 20140183501A1 · Kim · 2014 [cited by examiner]
US 20150340413A1 · Lee · 2015 [cited by examiner]
US 20160149156A1 · Kim · 2016 [cited by examiner]
US 20190165064A1 · Lee · 2019 [cited by examiner]
US 20220302222A1 · Lee et al. · 2022 [cited by applicant]
KR 102050505 · 2019 [cited by applicant]
KR 1020210046114 · 2021 [cited by applicant]
KR 1020210086869 · 2021 [cited by applicant]
Guo et al., “A Review of Germanium-Antimony-Telluride Phase Change Materials for Non-Volatile Memories and Optical Modulators”, Applied Science, Feb. 4, 2019, pp. 530 (1-26), vol. 9, No. 3. [cited by applicant]