IP Library Granted Patent US 12,035,459
Granted Patent B2
US 12,035,459 · App. 18/521,587 · Granted Jul 9, 2024

Methods of forming flexible interconnect circuits

Inventors: Kevin Michael Coakley (Belmont, CA); Malcolm Parker Brown (Mountain View, CA); Dongao Yang (Redwood City, CA); Michael Lawrence Miller (San Mateo, CA); Paul Henry Lego (Woodside, CA)
Assignee: CelLink Corporation
H05K1/0201H01M50/519H05K1/118H05K3/007H05K3/0073H05K3/06H05K3/20H05K3/281H05K3/4623H05K3/064H05K2201/0145H05K2201/015H05K2201/0154H05K2201/10037H05K2203/066Y02E60/10Y10T29/49156
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Quick Facts
Patent No.
US 12,035,459
App. No.
18/521,587
Granted
Jul 9, 2024
Kind
B2
Abstract

A method of forming a flexible interconnect circuit is described. The method may comprise laminating a substrate to a conductive layer and patterning the conductive layer using a laser while the conductive layer remains laminated to the substrate thereby forming a first conductive portion and a second conductive portion of the conductive layer. The substrate maintains the orientation of the first conductive portion relative to the second conductive portion during and after patterning. The method may also comprise laminating a first insulator to the conductive layer and removing the substrate from the conductive layer such that the first insulator maintains the orientation of the first conductive portion relative to the second conductive portion while and after the substrate is removed. The method may also comprise laminating a second insulator to the second side of the conductive layer while the first insulator remains laminated to the substrate.

Claims (66)

1. A method of forming a flexible interconnect circuit, the method comprising:

laminating a substrate to a conductive layer, wherein:

the conductive layer comprises a first side and a second side, opposite of the first side, and

the substrate is laminated to the second side of the conductive layer;

patterning the conductive layer using one or more of laser cutting and laser ablation while the conductive layer remains laminated to the substrate, wherein:

patterning the conductive layer forms a first conductive portion and a second conductive portion of the conductive layer, at least partially separated from the first conductive portion,

patterning the conductive layer further forms a third conductive portion of the conductive layer, separated by a first pattern opening from the first conductive portion and also separated by a second pattern opening from the second conductive portion,

patterning the conductive layer comprises removing the third conductive portion from the substrate thereby forming a pattern opening in place of the first pattern opening, the third conductive portion, and the second pattern opening, and

the substrate maintains orientation of the first conductive portion relative to the second conductive portion during and after patterning;

laminating a first insulator to the first side of the conductive layer while the conductive layer remains laminated to the substrate;

removing the substrate from the conductive layer, wherein the first insulator maintains the orientation of the first conductive portion relative to the second conductive portion while and after the substrate is removed; and

laminating a second insulator to the second side of the conductive layer while the first insulator remains laminated to the first side of the conductive layer, wherein:

the first insulator comprises a first-insulator opening prior to laminating the first insulator to the first side of the conductive layer,

the second insulator comprises a second-insulator opening prior to laminating the second insulator to the second side of the conductive layer, and

the first-insulator opening and the second-insulator opening coincide with each other and are aligned relative to the first conductive portion of the conductive layer thereby allowing access to the first conductive portion of the conductive layer from each of the first side and the second side.

2. The method of claim 1 , wherein patterning the conductive layer at least partially damages the substrate such that the substrate is able to maintain the orientation of the first conductive portion relative to the second conductive portion during and after patterning.

3. The method of claim 1 , wherein:

the pattern opening in the conductive layer is defined by sidewalls of the first conductive portion and the second conductive portion, extending to the substrate, and

the sidewalls are tapered such that the pattern opening is smaller at an interface with the substrate than away from the substrate.

4. The method of claim 3 , wherein the sidewalls have a smooth transition to the first side of the conductive layer.

5. The method of claim 1 , wherein the third conductive portion of the conductive layer is removed from the substrate prior to laminating the first insulator to the first side of the conductive layer.

6. The method of claim 1 , wherein the third conductive portion of the conductive layer is removed from the first insulator after the substrate has been removed from the conductive layer.

7. The method of claim 1 , wherein the third conductive portion is removed while removing the substrate from the conductive layer.

8. The method of claim 1 , wherein:

at least one of the first insulator and the second insulator comprises a thermally conductive mounting adhesive having a thermal conductivity of least about 0.2 W/mK, and

the thermally conductive mounting adhesive overlaps with the first conductive portion and bonds the first insulator and the second insulator.

9. The method of claim 8 , wherein the thermally conductive mounting adhesive is one of an inorganic particle-filled dielectric film or a thermally conductive pressure- sensitive adhesive (PSA) film.

10. The method of claim 1 , wherein the conductive layer comprises aluminum.

11. The method of claim 1 , wherein the conductive layer has a uniform composition throughout a thickness of the conductive layer.

12. The method of claim 1 , wherein the conductive layer is a rolled metal foil.

13. The method of claim 1 , wherein, after laminating the first insulator to the first side of the conductive layer, the first insulator extends across the pattern opening in the conductive layer.

14. The method of claim 1 , wherein the first insulator comprises an insulator adhesive, contacting the first side of the conductive layer and comprising one of a polyolefin adhesive, a polyester adhesive, a polyimide adhesive, an acrylic, an epoxy, a cross-linking adhesive, a pressure- sensitive adhesive, and a thermoplastic adhesive.

15. The method of claim 14 , wherein the insulator adhesive further comprises thermally conductive, electrically insulating particles.

16. The method of claim 1 , wherein one or both of the first insulator and the second insulator are configured to adhesively bond to an external component.

17. The method of claim 1 , further comprising stacking an additional conductive portion over the first conductive portion along a thickness of the flexible interconnect circuit, wherein the additional conductive portion and the first conductive portion are interconnected.

18. The method of claim 17 , wherein the second insulator is laminated to the conductive layer through the additional conductive portion.

19. The method of claim 1 , wherein the conductive layer comprises copper.

20. The method of claim 1 , wherein at least one of the first insulator and the second insulator comprises a material selected from the group consisting of polyimide (PI), polyethylene terephthalate (PET), and polyethylene naphthalate (PEN).

21. A method of forming an interconnect circuit, the method comprising:

laminating a substrate to a conductive layer, wherein:

the conductive layer comprises a first side and a second side, opposite of the first side, and

the substrate is laminated to the second side of the conductive layer;

patterning the conductive layer using one or more of laser cutting and laser ablation while the conductive layer remains laminated to the substrate, wherein:

patterning the conductive layer forms a first conductive portion and a second conductive portion of the conductive layer, at least partially separated from the first conductive portion, and

the substrate maintains orientation of the first conductive portion relative to the second conductive portion during and after patterning;

laminating a first insulator to the first side of the conductive layer while the conductive layer remains laminated to the substrate, wherein the first insulator comprises an insulator adhesive, contacting the first side of the conductive layer and comprising one of a polyolefin adhesive, a polyester adhesive, a polyimide adhesive, an acrylic, an epoxy, a cross-linking adhesive, a pressure-sensitive adhesive, and a thermoplastic adhesive;

removing the substrate from the conductive layer, wherein the first insulator maintains the orientation of the first conductive portion relative to the second conductive portion while and after the substrate is removed; and

laminating a second insulator to the second side of the conductive layer while the first insulator remains laminated to the conductive layer , wherein:

the first insulator comprises a first-insulator opening prior to laminating the first insulator to the first side of the conductive layer,

the second insulator comprises a second-insulator opening prior to laminating the second insulator to the second side of the conductive layer, and

the first-insulator opening and the second-insulator opening coincide with each other and are aligned relative to the first conductive portion of the conductive layer thereby allowing access to the first conductive portion of the conductive layer from each of the first side and the second side.

22. The method of claim 1 , wherein the conductive layer has a thickness of between 50 micrometers and 500 micrometers.

23. A method of forming a flexible interconnect circuit, the method comprising:

laminating a substrate to a conductive layer, wherein:

the conductive layer comprises a first side and a second side, opposite of the first side, and

the substrate is laminated to the second side of the conductive layer;

patterning the conductive layer using one or more of laser cutting and laser ablation while the conductive layer remains laminated to the substrate, wherein:

patterning the conductive layer forms a first conductive portion and a second conductive portion of the conductive layer, at least partially separated from the first conductive portion, and

patterning the conductive layer at least partially damages the substrate such that the substrate maintains orientation of the first conductive portion relative to the second conductive portion during and after patterning;

laminating a first insulator to the first side of the conductive layer while the conductive layer remains laminated to the substrate;

removing the substrate from the conductive layer, wherein the first insulator maintains the orientation of the first conductive portion relative to the second conductive portion while and after the substrate is removed; and

laminating a second insulator to the second side of the conductive layer while the first insulator remains laminated to the conductive layer, wherein:

the first insulator comprises a first-insulator opening prior to laminating the first insulator to the first side of the conductive layer,

the second insulator comprises a second-insulator opening prior to laminating the second insulator to the second side of the conductive layer, and

the first-insulator opening and the second-insulator opening coincide with each other and are aligned relative to the first conductive portion of the conductive layer thereby allowing access to the first conductive portion of the conductive layer from each of the first side and the second side.

24. The method of claim 21 , wherein the insulator adhesive of the first insulator comprises the pressure-sensitive adhesive.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE CONVEYING PARTY FROM MALCOM PARKER BROWN TO MALCOLM PARKER BROWN PREVIOUSLY RECORDED AT REEL: 65689 FRAME: 406. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 24, 2024
From: COAKLEY, KEVIN MICHAEL; BROWN, MALCOLM PARKER; LEGO, PAUL HENRY; YANG, DONGAO; MILLER, MICHAEL LAWRENCE
To: CELLINK CORPORATION
Reel/Frame 067947/0123 →
NOTICE OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Apr 18, 2024
From: CELLINK CORPORATION
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 067166/0404 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2023
From: COAKLEY, KEVIN MICHAEL; BROWN, MALCOM PARKER; LEGO, PAUL HENRY; YANG, DONGAO; MILLER, MICHAEL LAWRENCE
To: CELLINK CORPORATION
Reel/Frame 065689/0406 →
Continuity (4)
Division 17383129 · Jul 22, 2021
Continuation 16034899 · Jul 13, 2018
Provisional Application 62531995 · Jul 13, 2017
Related Publication 20240098873A1 · Mar 21, 2024
Cited By (11)
US 12,300,854 US 12,471,245 US 12,510,598 US 12,525,671 US 12,542,330 US 12,567,611 US 12,573,694 US 12,589,642 US 12,604,404 US 12,620,666 US 12,646,787