Display device and method of fabricating the same
A display device includes a display area, a test pad, a plurality of first test transistors, and at least one outline. The display area includes pixels coupled to data lines and scan lines. The test pad receives a test signal. The first test transistors are coupled between the data lines of the display area and the test pad. The at least one outline is coupled between one of the first test transistors and the test pad. The at least one outline is located in a non-display area outside the display area.
1. A display device, comprising:
a substrate including a display area and a non-display area, the display area including a plurality of pixels electrically connected to a plurality of data lines and to a plurality of scan lines;
a first pad to receive a signal, the first pad including a first test voltage pad and a second test voltage pad separated from each other;
at least one first transistor electrically connected between one of the plurality of data lines of the display area and the first pad;
at least one outline electrically connected between the at least one first transistor and the first pad, the at least one outline being disposed in a non-display area, wherein
the at least one outline comprises a first outline and a second outline separated from each other,
the first outline is electrically connected between a first data line of the plurality of data lines and the first test voltage pad,
the second outline is electrically connected between a third data line of the plurality of data lines and the second test voltage pad, and
the first and second outlines are positioned closest to an edge of the substrate.
2. The display device of claim 1 , further comprising:
a scan driver disposed in the non-display area and electrically connected to the plurality of scan lines; and
a resistance electrically connected to a second data line of the plurality of data lines in the display area.
3. The display device of claim 2 , wherein the resistance is not coupled to the first or second outline.
4. The display device of claim 2 , wherein
the first outline is disposed further outside than the scan driver in the non-display area, and
at least one of the first and second outlines has a length adjacent to at least one side of the display area that is equal to or greater than a length of the at least one side.
5. The display device of claim 1 , wherein
the first outline goes and returns along an outside of each of a left side and an upper side of the display area at least once, and
the second outline goes and returns along an outside of each of a right side and the upper side of the display area at least once.
6. The display device of claim 5 , wherein
a first end of the first outline is electrically connected to the at least one first transistor electrically connected to the first data line and a second end of the first outline is electrically connected to the first test voltage pad, and
a first end of the second outline is electrically connected to the at least one first transistor electrically connected to the third data line and a second end of the second outline is electrically connected to the second test voltage pad.
7. The display device of claim 6 , wherein
the first test voltage pad is configured to receive a first test voltage,
the second test voltage pad is configured to receive a second test voltage, and
the first test voltage and the second test voltage have a same voltage level.
8. The display device of claim 6 , wherein
the first test voltage pad are configured to receive a first test voltage,
the second test voltage pad are configured to receive a second test voltage, and
the first test voltage and the second test voltage have different voltage level.
9. The display device of claim 6 , further comprising:
a first metal pattern disposed on the substrate;
a gate insulating layer disposed on the first metal pattern;
a semiconductor layer disposed on the gate insulating layer;
a passivation layer disposed on the semiconductor layer; and
a second metal pattern disposed on the passivation layer.
10. The display device of claim 9 , wherein
the at least one first transistor electrically connected to the first data line comprises a first gate electrode and a first active layer disposed on the gate insulating layer and overlapping the first gate electrode, and
a first end of the first active layer is electrically connected to the first data line and a second end of the first active layer is electrically connected to the first end of the first outline.
11. The display device of claim 1 , wherein the third data line is electrically connected to at least one pixel of the plurality of pixels in the display area.
12. The display device of claim 11 , wherein the at least one pixel of the plurality of pixels is a green pixel.
13. The display device of claim 1 , further comprising:
a second pad electrically connected to a control electrode of the at least one first transistor;
at least one second transistor electrically connected between a data pad for receiving an initialization signal and one of the plurality of data lines; and
a third pad electrically connected to a control electrode of the at least one second transistor.
14. The display device of claim 13 , wherein the data pad is electrically connected to the one of the plurality of data lines.
15. The display device of claim 13 , wherein the first pad, the second pad, the third pad, the data pad, the at least one first transistor, the at least one second transistor, and the at least one outline are in the non-display area.
16. The display device of claim 1 , wherein each of the first outline and the second outline goes and returns along a common side of the display area.