Device and method for implementing an operating mode based on opcodes
View Patent ↗The disclosure includes a method of authenticating a processor that includes an arithmetic and logic unit. At least one decoded operand of at least a portion of a to-be-executed opcode is received on a first terminal of the arithmetic and logic unit. A signed instruction is received on a second terminal of the arithmetic and logic unit. The signed instruction combines a decoded instruction of the to-be-executed opcode and a previous calculation result of the arithmetic and logic unit.
1 . A method, comprising:
receiving, in a processing unit of a printer, a command including one or more opcodes from an ink cartridge installed in the printer;
determining, with the processing unit, whether or not the one or more opcodes take into account data of a context register bank of the processing unit; and
implementing, with the processing unit, a selected operating mode of the printer based on whether or not the one or more opcodes take into account data of the context register bank.
2 . The method of claim 1 , wherein the implementing the selected operating mode includes processing, by the processing unit, a first instruction associated with the command.
3 . The method of claim 2 , wherein processing the first instruction includes processing by an arithmetic and logic unit of the processing unit, the first instruction.
4 . The method of claim 2 , comprising storing, in the context register bank of the processing unit, a first result of processing the in first instruction.
5 . The method of claim 4 , wherein the context register bank is configured to generate a signature data based on the first result.
6 . The method of claim 5 , comprising:
receiving a second instruction subsequent to the first instruction;
generating a signed second instruction by signing the second instruction based on the first result.
7 . The method of claim 6 , wherein generating the signed second instruction includes combining the second instruction with signature data in a combination circuit of the processing unit.
8 . The method of claim 7 , comprising decoding the one or more opcodes to obtain the first instruction and a first operand.
9 . The method of claim 7 , wherein the signature data also includes at least a part of a first opcode executed by the processing unit prior to the generating the signed second instruction.
10 . A printer, comprising:
a processing unit configured to receive a command including one or more opcodes from an ink cartridge installed in the printer; and
a context register bank of the processing unit, wherein the processing unit is configured to determine whether or not the one or more opcodes take into account data of a the context register bank of the processing unit and to implement a selected operating mode of the printer based on whether or not the one or more opcodes take into account data of the context register bank.
11 . The printer of claim 10 , wherein the processing unit includes:
a combination circuit that operates to combine a first instruction associated with the command with signature data to generate a signed first instruction; and
an arithmetic and logic unit configured to process the signed first instruction to determine that the processor processing unit is authorized to process the first instruction;
wherein the signature data is a processing result of the arithmetic and logic unit processing a second instruction prior to the first instruction.
12 . The printer of claim 11 , wherein the combination circuit is configured to be controlled by an operand corresponding to the first instruction.
13 . The printer of claim 11 , wherein the combination circuit is configured to combine the first instruction with at least a part of an opcode containing the second instruction.
14 . The printer of claim 11 , further comprising a result register bank configured to store a processing result of the arithmetic and logic unit with respect to the signed first instruction.
15 . The printer of claim 11 , wherein the arithmetic and logic unit is configured to process the signed first instruction received on its first terminal with respect to a first operand received on its second terminal, the first instruction and the first operand corresponding to one another in a first opcode.
16 . The printer of claim 15 , further comprising a decoding circuit configured to decode the first opcode to obtain the first instruction and a plurality of operands including the first operand.
17 . The printer of claim 16 , further comprising a multiplexer configured to receive the plurality of operands from the decoding circuit.
18 . A printer, comprising an integrated circuit, the integrated circuit including:
a decoding circuitry that operates to decode a first opcode into a decoded instruction and a plurality of decoded operands;
a multiplexer circuitry that operates to select a first decoded operand from the plurality of decoded operands;
a combination circuitry that operates to generate a signed instruction by combining the decoded instruction and signature data; and
an arithmetic and logic circuitry that operates to determine whether the first opcode is authorized to be processed by the arithmetic and logic circuitry based on the signed instruction;
wherein the signature data includes at least a portion of a second opcode processed by the arithmetic and logic circuitry prior to the first opcode.
19 . The printer of claim 18 , wherein the signature data includes a processing result of the arithmetic and logic circuitry in processing the second opcode.
20 . The printer of claim 18 , wherein the multiplexer circuitry operates to deliver a second decoded operand of the plurality of decoded operands to the combination circuitry, the combination circuitry configured to be controlled by the second decoded operand in generating the signed instruction.