IP Library › Granted Patent US 12,743,567
Granted Patent B2
US 12,743,567 · App. 18/539,697 · Granted Sep 22, 2026

Systems and methods for designing a discrete device product

Inventors: James Joseph Victory (Trabuco Canyon, CA); Thomas Neyer (Munich, DE); YunPeng Xiao (Shanghai, CN); Hyeongwoo Jang (Bucheon-Si, KR); Peter Dingenen (Oudenaarde, BE); Vaclav Valenta (Brno, CZ); Mehrdad Baghaie Yazdi (Munich, DE); Christopher Lawrence Rexer (Scottsdale, AZ); Stanley Benczkowski (Bear Creek Township, PA); Thierry Bordignon (Toulouse, FR); Wai Lun Chu (Kowloon, HK); Roman Sickaruk (Nezamyslice, CZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
G06F30/31G06F30/367G06F30/392G06F30/398G06N3/04G06N3/08G06F2111/02G06F2117/12G06F2119/08
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Quick Facts
Patent No.
US 12,743,567
App. No.
18/539,697
Granted
Sep 22, 2026
Kind
B2
Abstract

Implementations disclosed herein may include receiving from a user a selection of at least one die, a package type, and at least one test condition; generating, using a processor, a product die configuration and a product package configuration using a predictive modeling module and the at least one die and the package type; generating a graphic design system file; generating a package bonding diagram; generating a product spice model of the discrete device product using a technology computer aided design module; generating, using a processor, one or more datasheet characteristics of the discrete device product with the product SPICE model; generating a product datasheet for the discrete device product using the graphic design system file; and using a second interface generated by a computing device to provide access to the graphic design system file, the package bonding diagram, the product datasheet, and the product SPICE model.

Claims (48)

1 . A system configured for designing a discrete device product, the system comprising:

one or more hardware processors configured by machine-readable instructions to:

receive from a user a selection of at least one discrete device die and a selection of at least one test condition;

generate a product die configuration using the at least one discrete device die and a predictive modeling module;

generate a graphic design system file using a graphic design system module with the product die configuration;

generate a package bonding diagram using a build diagram system module with the graphic design system file;

generate a product SPICE model corresponding with the product die configuration with a product SPICE model generating module;

provide the product SPICE model to a product simulation module;

generate one or more datasheet characteristics of the discrete device product with the product SPICE model using the product simulation module;

provide the one or more datasheet characteristics to a datasheet formation module;

generate product datasheet for the discrete device product using the graphic design system file, the package bonding diagram, and the one or more datasheet characteristics; and

provide access to the graphic design system file, the package bonding diagram, the product SPICE model, and the product datasheet to the user.

2 . The system of claim 1 , wherein the system is further configured to:

receive a selection of a package type, include the package type in the product die configuration, select a die SPICE model corresponding with the at least one discrete device die, and select a package SPICE model corresponding with the package type for generating the product SPICE model with the product SPICE model generating module.

3 . The system of claim 1 , wherein the predictive modeling module comprises a back propagated model and the back propagated model is used to predict one or more electrical performance parameters of the discrete device product.

4 . The system of claim 1 , wherein the graphic design system module uses one of a native parameterized layout cell (PCELL) or a generic parameterized layout cell (PCELL).

5 . The system of claim 1 , wherein the predictive modeling module comprises a back propagated model generated by fitting data from previous discrete device products.

6 . The system of claim 5 , wherein the back propagated model is used to predict a die dimension, gate pad location, or gate runner.

7 . The system of claim 1 , wherein the build diagram system module uses a virtual clip to generate the package bonding diagram.

8 . A system configured for designing a discrete device product, the system comprising:

one or more hardware processors configured by machine-readable instructions to:

receive from a user a selection of at least one discrete device die and a selection of at least one test condition;

generate a product die configuration the at least one discrete device die and a predictive modeling module comprising a back propagated model generated by fitting data from previous discrete device products;

generate a graphic design system file using a graphic design system module with the product die configuration;

generate a package bonding diagram using a build diagram system module with the graphic design system file; and

generate a product SPICE model corresponding with the product die configuration with a product SPICE model generating module.

9 . The system of claim 8 , where the system is further configured to: receive a selection of a package type, include the package type in the product die configuration, select a die SPICE model corresponding with the at least one discrete device die, and select a package SPICE model corresponding with the package type for generating the product SPICE model with the product SPICE model generating module.

10 . The system of claim 8 , wherein the back propagated model is used to predict one or more electrical performance parameters of the discrete device product.

11 . The system of claim 8 , wherein the back propagated model is used to predict a die dimension, gate pad location, or gate runner.

12 . The system of claim 8 , wherein the graphic design system module uses a native parameterized layout cell (PCELL).

13 . The system of claim 8 , wherein the graphic design system module uses a generic parameterized layout cell (PCELL).

14 . A method of designing a discrete device product, the method comprising:

receiving from a user a selection of at least one discrete device die and a selection of at least one test condition;

generating, using a processor, a product die configuration and a product package configuration using a predictive modeling module and the at least one discrete device die, the predictive modeling module comprising a back propagated model;

generating, using the processor, a graphic design system file using a graphic design system module with the product die configuration;

generating, using the processor, a package bonding diagram using a build diagram system module with the graphic design system file;

generating, using the processor, a product SPICE model corresponding with the product die configuration using a product SPICE model generating module;

providing, using the processor, the product SPICE model to a product simulation module;

generating, using the processor, one or more datasheet characteristics of the discrete device product with the product SPICE model;

providing, using the processor, the one or more datasheet characteristics to a datasheet formation module;

generating, using the processor, a product datasheet for the discrete device product using the graphic design system file, the package bonding diagram, and the one or more datasheet characteristics; and

providing access to the graphic design system file, the package bonding diagram, the product SPICE model, and the product datasheet to the user.

15 . The method of claim 14 , further comprising: receiving a selection of a package type, including the package type in the product die configuration, selecting a die SPICE model corresponding with the at least one discrete device die, and selecting a package SPICE model corresponding with the package type for generating the product SPICE model with the product SPICE model generating module.

16 . The method of claim 14 , wherein the back propagated model is used to predict one or more electrical performance parameters of the discrete device product.

17 . The method of claim 14 , wherein the back propagated model is used to predict a die dimension, gate pad location, or gate runner.

18 . The method of claim 14 , wherein the graphic design system module uses a native parameterized layout cell (PCELL) or a generic parameterized layout cell (PCELL).

19 . The method of claim 14 , wherein the back propagated model is generated by fitting data from previous discrete device products.

20 . The method of claim 14 , wherein the build diagram system module uses a virtual clip to generate the package bonding diagram.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2023
From: VICTORY, JAMES JOSEPH; NEYER, THOMAS; XIAO, YUNPENG; JANG, HYEONGWOO; DINGENEN, PETER; VALENTA, VACLAV; SARKAR, TIRTHAJYOTI; BAGHAJE YAZDI, MEHRDAD; REXER, CHRISTOPHER LAWRENCE; BENCZKOWSKI, STANLEY; BORDIGNON, THIERRY; CHU, WAI LUN; SICKARUK, ROMAN
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 065870/0239 →
Continuity (4)
Continuation 17930091 · Sep 7, 2022
Continuation 17076039 · Oct 21, 2020
Provisional Application 62923615 · Oct 21, 2019
Related Publication 20240119206A1 · Apr 11, 2024
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