IP Library › Granted Patent US 12,165,592
Granted Patent B2
US 12,165,592 · App. 18/543,226 · Granted Dec 10, 2024

Display device

Inventors: Jeong Hun Bang (Yongin-si, KR); Ji Hyun Ka (Yongin-si, KR); Kyung Hoon Kim (Yongin-si, KR); Joong Soo Moon (Yongin-si, KR); Jae Sic Lee (Yongin-si, KR); Jae Yong Lee (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G09G3/3233H10K59/131G09G2300/0413G09G2300/0426G09G2300/0452G09G2300/0819G09G2300/0852G09G2320/0233
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Quick Facts
Patent No.
US 12,165,592
App. No.
18/543,226
Granted
Dec 10, 2024
Kind
B2
Abstract

There is provided a display device including a substrate, a circuit layer, and an element layer. A display area of the substrate includes a main display area in which emission areas are arranged side by side, and at least one sub-display area surrounded by the main display area. The at least one sub-display area further includes light transmission areas located between the emission areas. The circuit layer includes light-emitting pixel drivers respectively electrically connected to the light-emitting elements of the element layer, data lines transmitting data signals to the light-emitting pixel drivers, first dummy lines extending in a first direction intersecting the data lines, and second dummy lines extending parallel to the data lines and paired with the data lines, respectively. The second dummy lines include reset transmission lines extending from the non-display area to the at least one sub-display area.

Claims (87)

1. A display device comprising:

a substrate comprising a display area comprising emission areas, and a non-display area around the display area;

a circuit layer above the substrate; and

an element layer above the circuit layer, and comprising light-emitting elements respectively corresponding to the emission areas,

wherein the display area comprises a main display area in which the emission areas are arranged side by side, and at least one sub-display area surrounded by the main display area,

wherein the at least one sub-display area further comprises light transmission areas between the emission areas, and

wherein the circuit layer comprises:

light-emitting pixel drivers respectively electrically connected to the light-emitting elements of the element layer;

data lines for transmitting data signals to the light-emitting pixel drivers;

first dummy lines extending in a first direction crossing the data lines; and

second dummy lines extending parallel to the data lines, respectively paired with the data lines, and comprising reset transmission lines extending from the non-display area to the at least one sub-display area.

2. The display device of claim 1 , further comprising a display driving circuit for outputting the data signals of the data lines,

wherein the circuit layer further comprises data supply lines in the non-display area, and electrically connected to the display driving circuit,

wherein a bypass area on one side of the display area comprises a bypass middle area, a first bypass side area parallel to the bypass middle area in the first direction and contacting the non-display area, and a second bypass side area between the bypass middle area and the first bypass side area,

wherein the data lines comprise a first data line in the first bypass side area, and a second data line in the second bypass side area,

wherein the first dummy lines comprise a first transmission bypass line electrically connected to the first data line,

wherein the second dummy lines further comprise a second transmission bypass line paired with the second data line and electrically connected to the first transmission bypass line,

wherein, among the data supply lines, a first data supply line for transmitting a first data signal of the first data line is electrically connected to the first data line through the first transmission bypass line and the second transmission bypass line, and a second data supply line for transmitting a second data signal of the second data line is directly electrically connected to the second data line.

3. The display device of claim 2 , wherein the circuit layer further comprises a first power supply line and a second power supply line for respectively transmitting a first power and a second power for driving the light-emitting elements,

wherein the first dummy lines further comprise first auxiliary lines electrically connected to the second power supply line, and

wherein the second dummy lines further comprise second auxiliary lines electrically connected to the first auxiliary lines and the second power supply line.

4. The display device of claim 3 , wherein two of the first auxiliary lines extend from respective sides of the first transmission bypass line to the non-display area, and

wherein one of the second auxiliary lines extends from one side of the second transmission bypass line to the non-display area.

5. The display device of claim 3 , wherein, among the light-emitting pixel drivers, one light-emitting pixel driver in the main display area comprises:

a first transistor for generating a driving current for driving one of the light-emitting elements;

a second transistor electrically connected between one of the data lines and a first electrode of the first transistor;

a third transistor electrically connected between a gate electrode of the first transistor and a second electrode of the first transistor;

a fourth transistor electrically connected between a first initialization power line for transmitting a first initialization power and the gate electrode of the first transistor;

a fifth transistor electrically connected between a first power line for transmitting the first power and the first electrode of the first transistor;

a sixth transistor electrically connected between the second electrode of the first transistor and the one light-emitting element;

a seventh transistor electrically connected between a second initialization power line for transmitting a second initialization power and the one light-emitting element; and

an eighth transistor electrically connected between a bias power line for transmitting a bias power and the first electrode of the first transistor.

6. The display device of claim 5 , wherein the at least one sub-display area overlaps at least one optical device.

7. The display device of claim 6 , wherein, among the light-emitting pixel drivers, another light-emitting pixel driver in the at least one sub-display area is electrically connected to another light-emitting element among the light-emitting elements, and

wherein the display device further comprises a reset unit configured to transmit a reset power to the another light-emitting element via a reset power line based on a reset control signal of a reset control line.

8. The display device of claim 7 , wherein the reset unit comprises a ninth transistor electrically connected between the reset power line and the another light-emitting element, and

wherein a gate electrode of the ninth transistor is electrically connected to a reset control line for transmitting the reset control signal.

9. The display device of claim 7 , wherein the circuit layer further comprises:

a reset power supply line in the non-display area for transmitting the reset power; and

a reset control supply line in the non-display area for transmitting the reset control signal, and

wherein the reset transmission lines comprise:

a reset power transmission line electrically connecting the reset power supply line and the reset power line; and

a reset control transmission line electrically connecting the reset control supply line and the reset control line.

10. The display device of claim 9 , wherein two adjacent ones of the second dummy lines are located between, and are respectively paired with, two of the data lines respectively overlapping two adjacent ones of the light-emitting pixel drivers.

11. The display device of claim 10 , wherein the second dummy lines further comprise an offset line adjacent to the reset control transmission line for transmitting an offset signal having a polarity that is opposite to that of the reset control signal.

12. A display device comprising:

a substrate comprising a display area comprising emission areas, and a non-display area around the display area;

a circuit layer above the substrate; and

an element layer above the circuit layer, and comprising light-emitting elements respectively corresponding to the emission areas,

wherein the display area comprises:

a main display area in which the emission areas are arranged side by side; and

at least one sub-display area surrounded by the main display area, and overlapping at least one optical device under the substrate,

wherein the circuit layer comprises:

light-emitting pixel drivers respectively electrically connected to the light-emitting elements of the element layer;

data lines for transmitting data signals to the light-emitting pixel drivers;

first dummy lines extending in a first direction crossing the data lines;

second dummy lines extending parallel to the data lines, and respectively paired with the data lines;

data supply lines in the non-display area, and electrically connected to a display driving circuit for outputting data signals of the data lines; and

a first power supply line and a second power supply line for respectively transmitting a first power and a second power for driving the light-emitting elements,

wherein a bypass area on one side of the display area comprises a bypass middle area, a first bypass side area parallel to the bypass middle area in the first direction and contacting the non-display area, and a second bypass side area between the bypass middle area and the first bypass side area,

wherein the data lines comprise a first data line in the first bypass side area, and a second data line in the second bypass side area,

wherein the first dummy lines comprise:

a first transmission bypass line electrically connected to the first data line; and

first auxiliary lines electrically connected to the second power supply line, and

wherein the second dummy lines comprise:

a second transmission bypass line paired with the second data line, and electrically connected to the first transmission bypass line;

reset transmission lines extending from the non-display area to the at least one sub-display area; and

second auxiliary lines electrically connected to the first auxiliary lines and the second power supply line.

13. The display device of claim 12 , wherein, among the light-emitting pixel drivers, one light-emitting pixel driver in the main display area comprises:

a first transistor for generating a driving current for driving one of the light-emitting elements;

a second transistor electrically connected between one of the data lines and a first electrode of the first transistor;

a third transistor electrically connected between a gate electrode of the first transistor and a second electrode of the first transistor;

a fourth transistor electrically connected between a first initialization power line for transmitting a first initialization power and the gate electrode of the first transistor;

a fifth transistor electrically connected between a first power line for transmitting the first power and the first electrode of the first transistor;

a sixth transistor electrically connected between the second electrode of the first transistor and the one light-emitting element;

a seventh transistor electrically connected between a second initialization power line for transmitting a second initialization power and the one light-emitting element; and

an eighth transistor electrically connected between a bias power line for transmitting a bias power and the first electrode of the first transistor.

14. The display device of claim 13 , wherein, among the light-emitting pixel drivers, another light-emitting pixel driver in the at least one sub-display area is electrically connected to another light-emitting element among the light-emitting elements,

wherein the display device further comprises a reset unit configured to transmit a reset power to the another light-emitting element via a reset power line based on a reset control signal of a reset control line,

wherein the circuit layer further comprises:

a reset power supply line in the non-display area for transmitting the reset power; and

a reset control supply line in the non-display area for transmitting the reset control signal, and

wherein the reset transmission lines comprise:

a reset power transmission line electrically connecting the reset power supply line and the reset power line; and

a reset control transmission line electrically connecting the reset control supply line and the reset control line.

15. The display device of claim 14 , wherein, two adjacent ones of the second dummy lines are between, and are respectively paired with, two of the data lines respectively overlapping two adjacent ones of the light-emitting pixel drivers, and

wherein the second dummy lines further comprise an offset line that is adjacent to the reset control transmission line for transmitting an offset signal having a polarity opposite to that of the reset control signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 3, 2024
From: BANG, JEONG HUN; KA, JI HYUN; KIM, KYUNG HOON; MOON, JOONG SOO; LEE, JAE SIC; LEE, JAE YONG
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 068830/0954 →
Priority Claims (2)
KR 10-2023-0037598 · Mar 22, 2023 · national
KR 10-2023-0074125 · Jun 9, 2023 · national
Continuity (1)
Related Publication 20240321204A1 · Sep 26, 2024
Cited By (1)
US 12,744,003