Voltage detection for managed memory systems
Methods, systems, and devices for voltage detection for managed memory systems are described. In some cases, a memory system may include circuitry to monitor one or more supply voltages to the memory system or voltages generated by the memory system to determine whether a voltage rises above an operational range. In some cases, an overvoltage detector may include an undervoltage detector that has been tuned or manufactured to have a higher threshold than an undervoltage detector used to determine whether a voltage has fallen below the operational range. Accordingly, the memory system may monitor a voltage using an undervoltage detector having a threshold corresponding to a lower bound or lower operation point of the operational range of the monitored voltage and an overvoltage detectors having a threshold corresponding to the upper bound or upper operational point of the operational range.
1. A memory system, comprising:
one or more memory devices;
processing circuitry coupled with the one or more memory devices, the processing circuitry configured to be coupled with a host device, receive one or more commands from the host device, and access the one or more memory devices based at least in part on the one or more commands; and
a voltage detector circuit coupled with the one or more memory devices and configured to monitor one or more supply voltages of the one or more memory devices and determine whether the one or more supply voltages satisfy a first threshold of the voltage detector circuit and a second threshold of the voltage detector circuit based at least in part on monitoring the one or more supply voltages, wherein the first threshold and the second threshold correspond to an operational range of the one or more memory devices.
2. The memory system of claim 1 , wherein:
the voltage detector circuit is configured to set a first flag indicating that a supply voltage of the one or more supply voltages exceeds the first threshold of the voltage detector circuit;
the voltage detector circuit is configured to set a second flag indicating that the supply voltage exceeds the second threshold of the voltage detector circuit; and
the voltage detector circuit is configured to invert the second flag, wherein determining that the supply voltage exceeds an upper operating point of the operational range is based at least in part on inverting the second flag.
3. The memory system of claim 1 , wherein the voltage detector circuit is configured to issue an indication of the one or more supply voltages to a health engine of the memory system.
4. The memory system of claim 1 , wherein the memory system is configured to transmit an indication of a safe mode to the host device based at least in part on determining that a supply voltage of the one or more supply voltages exceeds an upper operating point of the operational range.
5. The memory system of claim 1 , wherein the memory system is configured to:
initiate a safe mode of the processing circuitry based at least in part on determining that a supply voltage of the one or more supply voltages exceeds an upper operating point of the operational range.
6. The memory system of claim 5 , wherein, to initiate the safe mode, the memory system is further configured to send an interrupt to the processing circuitry based at least in part on determining that the supply voltage exceeds the upper operating point of the operational range.
7. The memory system of claim 5 , wherein, to initiate the safe mode, the memory system is further configured to set a flag accessible by code executable by the processing circuitry based at least in part on determining that the supply voltage exceeds the upper operating point of the operational range.
8. The memory system of claim 1 , wherein the memory system is further configured to delay a transfer of data between the one or more memory devices and the host device based at least in part on determining that a supply voltage of the one or more supply voltages exceeds an upper operating point of the operational range.
9. The memory system of claim 1 , wherein the voltage detector circuit comprises a plurality of resistors, wherein a first portion of the voltage detector circuit has a first configuration that comprises a first subset of active resistors of the plurality of resistors and a second portion of the voltage detector circuit has a second configuration that comprises a second subset of active resistors of the plurality of resistors.
10. The memory system of claim 1 , wherein the processing circuitry is configured to:
receive the one or more supply voltages; and
generate one or more additional supply voltages using the one or more supply voltages.
11. The memory system of claim 10 , wherein the voltage detector circuit is further configured to monitor the one or more additional supply voltages and determine whether the one or more additional supply voltages satisfy the first threshold and the second threshold based at least in part on monitoring the one or more additional supply voltages.
12. A non-transitory computer-readable medium storing code comprising instructions which, when executed by processing circuitry of an electronic device, cause the electronic device to:
monitor one or more supply voltages of a memory device; and
determine, using a voltage detector circuit, whether the one or more supply voltages satisfy a first threshold of the voltage detector circuit and a second threshold of the voltage detector circuit based at least in part on monitoring the one or more supply voltages, wherein the first threshold and the second threshold correspond to an operational range of the memory device.
13. The non-transitory computer-readable medium of claim 12 , wherein the instructions, when executed by the processing circuitry of the electronic device, further cause the electronic device to:
set a first flag indicating that a supply voltage of the one or more supply voltages exceeds the first threshold of the voltage detector circuit;
set a second flag indicating that the supply voltage exceeds the second threshold of the voltage detector circuit; and
invert the second flag, wherein determining that the supply voltage exceeds an upper operating point of the operational range is based at least in part on inverting the second flag.
14. The non-transitory computer-readable medium of claim 12 , wherein the instructions, when executed by the processing circuitry of the electronic device, further cause the electronic device to:
issue an indication of the one or more supply voltages to a health engine of the memory device.
15. The non-transitory computer-readable medium of claim 12 , wherein the instructions, when executed by the processing circuitry of the electronic device, further cause the electronic device to:
initiate a safe mode of the processing circuitry based at least in part on determining that a supply voltage of the one or more supply voltages exceeds an upper operating point of the operational range; and
transmit an indication of the safe mode to a host device based at least in part on initiating the safe mode.
16. The non-transitory computer-readable medium of claim 12 , wherein the instructions, when executed by the processing circuitry of the electronic device, further cause the electronic device to:
send an interrupt to the processing circuitry based at least in part on determining that a supply voltage of the one or more supply voltages exceeds an upper operating point of the operational range; and
initiate a safe mode of the processing circuitry based at least in part on sending the interrupt.
17. The non-transitory computer-readable medium of claim 12 , wherein the instructions, when executed by the processing circuitry of the electronic device, further cause the electronic device to:
delay a transfer of data between the memory device and a host device based at least in part on determining that a supply voltage of the one or more supply voltages exceeds an upper operating point of the operational range.
18. The non-transitory computer-readable medium of claim 12 , wherein the instructions, when executed by the processing circuitry of the electronic device, further cause the electronic device to:
receive the one or more supply voltages; and
generate one or more additional supply voltages using the one or more supply voltages.
19. A method, comprising:
monitoring one or more supply voltages of a memory device; and
determining, using a voltage detector circuit, whether the one or more supply voltages satisfy a first threshold of the voltage detector circuit and a second threshold of the voltage detector circuit based at least in part on monitoring the one or more supply voltages, wherein the first threshold and the second threshold correspond to an operational range of the memory device.
20. The method of claim 19 , further comprising:
setting a first flag indicating that a supply voltage of the one or more supply voltages exceeds the first threshold of the voltage detector circuit;
setting a second flag indicating that the supply voltage exceeds the second threshold of the voltage detector circuit; and
inverting the second flag, wherein determining that the supply voltage exceeds an upper operating point of the operational range is based at least in part on inverting the second flag.