Oscillator frequency based on mobility and PTAT temperature compensation

1. A system, comprising:

a first transistor having a control terminal and first and second terminals, the first terminal coupled to a current mirror and the control terminal coupled to a first current source and a resistor;

a second transistor having a control terminal and first and second terminals, the first terminal coupled to the current mirror, the second terminal coupled to the second terminal of the first transistor, and the control terminal coupled to the resistor and a second current source;

a third transistor having a control terminal and first and second terminals, the first terminal coupled to a voltage terminal, the second terminal coupled to the control terminal of the second transistor, and the control terminal coupled to the first terminal of the second transistor; and

a fourth transistor having a control terminal and first and second terminals, the control terminal coupled to the current mirror, the first and second terminals coupled to one another and to the second terminal of the first transistor and the second terminal of the second transistor.

2. The system of claim 1 , wherein the first current source is coupled to the voltage terminal.

3. The system of claim 1 , wherein the fourth transistor is configured as a metal-oxide semiconductor (MOS) capacitor.

4. The system of claim 1 , further comprising:

a first switch and a second switch coupled to the control terminal of the fourth transistor.

5. The system of claim 4 , wherein the first switch is coupled between the control terminal of the fourth transistor and the current mirror, and the second switch is coupled between the control terminal of the fourth transistor and a second current mirror.

6. The system of claim 1 , further comprising:

a fifth transistor having a control terminal and first and second terminals, the first terminal coupled to the current mirror, the control terminal coupled to the first terminal, and the second terminal coupled to the second terminal of the first transistor and the second terminal of the second transistor;

a sixth transistor having a control terminal and first and second terminals, the first terminal coupled to a second current mirror, and the second terminal coupled to the second terminal of the first transistor and the second terminal of the second transistor; and

a divider coupled to the control terminal of the fifth transistor and to the control terminal of the sixth transistor.

7. The system of claim 6 , wherein the fifth transistor and the sixth transistor are bipolar junction transistors.

8. The system of claim 1 , wherein the second transistor is larger than the first transistor.

9. The system of claim 1 , wherein the second current source is larger than the first current source.

10. A system, comprising:

a first transistor having a control terminal and first and second terminals, the first terminal coupled to a current mirror and the control terminal coupled to a first current source and a resistor;

a second transistor having a control terminal and first and second terminals, the first terminal coupled to the current mirror, the second terminal coupled to the second terminal of the first transistor, and the control terminal coupled to the resistor and a second current source;

a third transistor having a control terminal and first and second terminals, the first terminal coupled to a voltage terminal, the second terminal coupled to the control terminal of the second transistor, and the control terminal coupled to the first terminal of the second transistor;

a fourth transistor having a control terminal and first and second terminals, the control terminal coupled to the current mirror, the first and second terminals coupled to one another and to the second terminal of the first transistor and the second terminal of the second transistor; and

a comparator having a comparator output and first and second comparator inputs, wherein the control terminal of the fourth transistor is coupled to the first comparator input.

11. The system of claim 10 , further comprising:

a first switch and a second switch coupled to the control terminal of the fourth transistor.

12. The system of claim 11 , further comprising:

a third switch and a fourth switch coupled to the second comparator input, wherein the third switch is coupled to a first voltage reference terminal and the fourth switch is coupled to a second voltage reference terminal.

13. The system of claim 12 , further comprising:

an inverter coupled to the comparator output.

14. The system of claim 10 , further comprising:

a fifth transistor having a control terminal and first and second terminals, the first terminal coupled to the current mirror, the control terminal coupled to the first terminal, and the second terminal coupled to the second terminal of the first transistor and the second terminal of the second transistor;

a sixth transistor having a control terminal and first and second terminals, the first terminal coupled to a second current mirror, and the second terminal coupled to the second terminal of the first transistor and the second terminal of the second transistor; and

a divider coupled to the control terminal of the fifth transistor and to the control terminal of the sixth transistor.

15. A system, comprising:

a first transistor having a control terminal and first and second terminals, the first terminal coupled to a current mirror and the control terminal coupled to a first current source and a resistor, the first current source configured to provide a proportional to absolute temperature (PTAT) current;

a second transistor having a control terminal and first and second terminals, the first terminal coupled to the current mirror, the second terminal coupled to the second terminal of the first transistor, and the control terminal coupled to the resistor and a second current source;

a third transistor having a control terminal and first and second terminals, the first terminal coupled to a voltage terminal, the second terminal coupled to the control terminal of the second transistor, and the control terminal coupled to the first terminal of the second transistor;

a fourth transistor having a control terminal and first and second terminals, the control terminal coupled to the current mirror, the first and second terminals coupled to one another and to the second terminal of the first transistor and the second terminal of the second transistor, the fourth transistor configured to receive a first current from the current mirror at its control terminal; and

a comparator having a comparator output and first and second comparator inputs, wherein the control terminal of the fourth transistor is coupled to the first comparator input, and wherein the comparator is configured to compare a voltage at the control terminal of the fourth transistor to a reference voltage.

16. The system of claim 15 , wherein the fourth transistor is further configured to provide an oscillating output signal at its control terminal.

17. The system of claim 16 , further comprising:

a first switch and a second switch coupled to the control terminal of the fourth transistor.

18. The system of claim 17 , further comprising:

an inverter coupled to the comparator output.

19. The system of claim 18 , wherein the comparator is configured to provide a first output signal and the inverter is configured to provide a second output signal, wherein the first output signal is configured to control the first switch and the second output signal is configured to control the second switch.

20. The system of claim 16 , wherein a frequency of the oscillating output signal is dependent on electron mobility.