IP Library Granted Patent US 12,519,854
Granted Patent B2
US 12,519,854 · App. 18/603,641 · Granted Jan 6, 2026

Storage system and method for transferring data thereof

Inventors: Tomoki Shoji (Tokyo, JP); Masanori Takada (Tokyo, JP); Katsuya Tanaka (Tokyo, JP)
Assignee: Hitachi Vantara, Ltd.
H04L67/1097H04L49/9047
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Quick Facts
Patent No.
US 12,519,854
App. No.
18/603,641
Granted
Jan 6, 2026
Kind
B2
Abstract

A storage system includes a plurality of storage controllers. The storage controller includes a processor, a memory, and a transfer device that processes control data for controlling an internal operation of the storage system, the control data being transmitted and received between the plurality of storage controllers. The processor accumulates the control data in the memory when a transfer request for the control data is generated, generates a write request for transmitting a plurality of the control data stored in the memory, and transmits the write request to the other storage controller. The transfer device writes a plurality of the control data included in the write request to the memory upon receiving the write request.

Claims (41)

1 . A storage system comprising a plurality of storage controllers,

a first storage controller of the plurality of storage controllers including a processor, a memory, and a transfer device that processes control data for controlling an internal operation of the storage system, the control data being transmitted and received between the plurality of storage controllers,

the processor configured to perform operations of

(i) checking a communication load on a transmission path connecting with a second storage controller of the plurality of storage controllers for transferring the control data,

(ii) accumulating the control data in the memory when a transfer request for the control data is generated and when the communication load on the transmission path is greater than or equal to a first predetermined threshold,

(iii) generating, when a data amount of the control data accumulated in the memory is greater than or equal to a second predetermined threshold, a write request for transmitting a plurality of control data comprising at least the control data accumulated in the memory, and

(iv) transmitting the write request to the second storage controller,

wherein the transfer device is configured to write the plurality of control data included in the write request to the memory upon receiving the write request.

2 . The storage system according to claim 1 , wherein

the control data is variable-length data,

the processor generates, for each of the control data, a transfer command including an address of a write destination of the control data, a data length of the control data, and the control data and generates the write request by concatenating transfer commands generated for the control data, and

the transfer device selects one of the transfer commands, reads out the control data from the transfer command based on a data length of the control data included in the selected transfer command, and writes the read control data to an address of a write destination of the control data included in the selected transfer command.

3 . The storage system according to claim 1 , wherein

the first storage controller includes a buffer memory accessible by the transfer device, and

the processor transmits the write request to the buffer memory of the second storage controller.

4 . A method for transferring data executed by a storage system in which the storage system includes a plurality of storage controllers, a first storage controller of the plurality of storage controllers including a processor, a memory, and a transfer device that processes control data for controlling an internal operation of the storage system, the control data being transmitted and received between the plurality of storage controllers, the method for transferring data comprising:

a first step of causing the processor to check a communication load on a transmission path connecting with a second storage controller of the plurality of storage controllers for transferring the control data and accumulate the control data in the memory when a transfer request for the control data is generated and when the communication load on the transmission path is greater than or equal to a first predetermined threshold;

a second step of causing the processor to generate, when a data amount of the control data accumulated in the memory is greater than or equal to a second predetermined threshold, a write request for transmitting a plurality of control data comprising at least the control data accumulated in the memory and transmit the write request to the second storage controller; and

a third step of causing, upon receiving the write request, the transfer device to write the plurality of control data included in the write request to the memory.

5 . The method for transferring data according to claim 4 , wherein

the control data is variable-length data,

the second step includes causing the processor to generate, for each of the control data, a transfer command including an address of a write destination of the control data, a data length of the control data, and the control data, and causing the processor to generate the write request by concatenating transfer commands generated for the control data, and

the third step includes causing the transfer device to select one of the transfer commands, causing the transfer device to read out the control data from the transfer command based on a data length of the control data included in the selected transfer command, and causing the transfer device to write the read control data to an address of a write destination of the control data included in the selected transfer command.

6 . The method for transferring data according to claim 4 , wherein

the first storage controller includes a buffer memory accessible by the transfer device, and

the second step includes causing the processor to transmit the write request to the buffer memory of the second storage controller.

7 . A storage system comprising a plurality of storage nodes,

a first storage node of the plurality of storage nodes including a processor, a memory, and a transfer device that processes control data for controlling an internal operation of the storage system, the control data being transmitted and received between the plurality of storage nodes,

the processor configured to perform operations of

(i) checking a communication load on a transmission path connecting with a second storage node of the plurality of storage nodes for transferring the control data,

(ii) accumulating the control data in the memory when a transfer request for the control data is generated and when the communication load on the transmission path is greater than or equal to a first predetermined threshold,

(iii) generating, when a data amount of the control data accumulated in the memory is greater than or equal to a second predetermined threshold, a write request for transmitting a plurality of control data comprising at least the control data accumulated in the memory, and

(iv) transmitting the write request to the second storage node, and

the transfer device writing the plurality of control data included in the write request to the memory upon receiving the write request.

8 . The storage system according to claim 7 , wherein

the control data is variable-length data,

the processor generates, for each of the control data, a transfer command including an address of a write destination of the control data, a data length of the control data, and the control data and generates the write request by concatenating transfer commands generated for the control data, and

the transfer device selects one of the transfer commands, reads out the control data from the transfer command based on a data length of the control data included in the selected transfer command, and writes the read control data to an address of a write destination of the control data included in the selected transfer command.

9 . The storage system according to claim 7 , wherein

the first storage node includes a buffer memory accessible by the transfer device, and

the processor transmits the write request to the buffer memory of the second storage node.

Assignments (2)
MERGER Recorded Aug 26, 2024
From: HITACHI, LTD.
To: HITACHI VANTARA, LTD.
Reel/Frame 068393/0234 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2024
From: SHOJI, TOMOKI; TAKADA, MASANORI; TANAKA, KATSUYA
To: HITACHI, LTD.
Reel/Frame 066760/0924 →
Priority Claims (1)
JP 2023-089944 · May 31, 2023 · national
Continuity (1)
Related Publication 20240406264A1 · Dec 5, 2024
References Cited (14)
US 10225750B2 · Yamada · 2019 [cited by examiner]
US 10846013B1 · Park · 2020 [cited by examiner]
US 11550736B1 · Xu · 2023 [cited by examiner]
US 20050097273A1 · Kanai · 2005 [cited by examiner]
US 20060140008A1 · Hirako · 2006 [cited by examiner]
US 20130254487A1 · Tanaka · 2013 [cited by examiner]
US 20150058658A1 · Izuta · 2015 [cited by examiner]
US 20150160860A1 · Kwon · 2015 [cited by examiner]
US 20200226078A1 · Tanaka · 2020 [cited by examiner]
US 20210365397A1 · Tanaka · 2021 [cited by examiner]
US 20220182340A1 · Kawamura · 2022 [cited by examiner]
US 20220337532A1 · Tanaka et al. · 2022 [cited by applicant]
JP 2015501957A · 2015 [cited by applicant]
JP 2022164414A · 2022 [cited by applicant]