Accelerating neural networks in hardware using interconnected crossbars
A computing unit for accelerating a neural network is disclosed. The computing unit include an input unit that includes a digital-to-analog conversion unit and an analog-to-digital conversion unit that is configured to receive an analog signal from the output of a last interconnected analog crossbar circuit of a plurality of analog crossbar circuits and convert the second analog signal into a digital output vector, and a plurality of interconnected analog crossbar circuits that include the first interconnected analog crossbar circuit and the last interconnected crossbar circuits, wherein a second interconnected analog crossbar circuit of the plurality of interconnected analog crossbar circuits is configured to receive a third analog signal from another interconnected analog crossbar circuit of the plurality of interconnected crossbar circuits and perform one or more operations on the third analog signal based on the matrix weights stored by the crosspoints of the second interconnected analog crossbar.
1 . A computing unit for accelerating a neural network, comprising:
a plurality of interconnected analog crossbar circuits comprising a first analog crossbar circuit, a last analog crossbar circuit, and a set of intermediary analog crossbar circuits between the first analog crossbar circuit and the last analog crossbar circuit, wherein:
each interconnected analog crossbar circuit corresponds to a respective layer of the neural network and includes a plurality of crosspoints, each crosspoint storing a weight of a plurality of weights associated with the respective layer of the neural network,
wherein each analog crossbar circuit in the set of intermediary analog circuits receives an analog input from a preceding analog crossbar circuit and provides an analog output to a subsequent analog crossbar circuit;
a single digital-to-analog conversion (DAC) unit, wherein the single DAC unit is configured to convert a digital input vector into a first analog signal that is provided as an input to the first analog crossbar circuit; and
a single analog-to-digital conversion (ADC) unit, wherein the single ADC unit is configured to receive as an input a second analog signal from an output of the last analog crossbar circuit and convert the second analog signal into a digital output vector.
2 . The computing unit of claim 1 , wherein at least one analog crossbar circuit in the plurality of interconnected analog crossbar circuits is configured to perform matrix multiplication operations on an analog signal received by the at least one analog crossbar circuit based on the weights stored by the crosspoints of the at least one analog crossbar circuit.
3 . The computing unit of claim 1 , wherein the neural network is a fully-connected neural network.
4 . The computing unit of claim 1 , wherein each crossbar circuit of the plurality of interconnected analog crossbar circuits other than the first crossbar circuit is configured to receive as input an analog output generated by a preceding analog crossbar circuit in the plurality of interconnected analog crossbar circuits.
5 . The computing unit of claim 1 , further comprising:
at least one array of analog signal amplifiers that is positioned between a pair of analog crossbar circuits in the plurality of interconnected analog crossbar circuits.
6 . The computing unit of claim 5 , wherein the at least one array of analog signal amplifiers is configured to (i) receive as an input an analog output generated by a second analog crossbar circuit and (ii) generate as an analog output for use as an input to a third analog crossbar circuit.
7 . The computing unit of claim 5 , wherein each crossbar circuit of the plurality of interconnected analog crossbar circuits other than the first crossbar circuit is configured to receive as an input (i) an analog output generated by a preceding analog crossbar circuit or (ii) an analog output generated by the at least one array of analog signal amplifiers.
8 . A method of configuring a computing unit for accelerating a neural network, the method comprising:
configuring a plurality of interconnected analog crossbar circuits comprising a first analog crossbar circuit, a last analog crossbar circuit, and a set of intermediary analog crossbar circuits between the first analog crossbar circuit and the last analog crossbar circuit, wherein:
each interconnected analog crossbar circuit corresponds to a respective layer of the neural network and includes a plurality of crosspoints, each crosspoint storing a weight of a plurality of weights associated with the respective layer of the neural network,
wherein each analog crossbar circuit in the set of intermediary analog circuits receives an analog input from a preceding analog crossbar circuit and provides an analog output to a subsequent analog crossbar circuit;
configuring a single digital-to-analog conversion (DAC) unit to convert a digital input vector into a first analog signal that is provided as an input to the first analog crossbar circuit; and
configuring a single analog-to-digital conversion (ADC) unit to receive as an input a second analog signal from an output of the last analog crossbar circuit and convert the second analog signal into a digital output vector.
9 . The method of claim 8 , wherein at least one analog crossbar circuit in the plurality of interconnected analog crossbar circuits is configured to perform matrix multiplication operations on an analog signal received by the at least one analog crossbar circuit based on the weights stored by the crosspoints of the at least one analog crossbar circuit.
10 . The method of claim 8 , wherein the neural network is a fully-connected neural network.
11 . The method of claim 8 , wherein each crossbar circuit of the plurality of interconnected analog crossbar circuits other than the first crossbar circuit is configured to receive as input an analog output generated by a preceding analog crossbar circuit in the plurality of interconnected analog crossbar circuits.
12 . The method of claim 8 , further comprising:
at least one array of analog signal amplifiers that is positioned between a pair of analog crossbar circuits in the plurality of interconnected analog crossbar circuits.
13 . The method of claim 12 , wherein the at least one array of analog signal amplifiers is configured to (i) receive as an input an analog output generated by a second analog crossbar circuit and (ii) generate as an analog output for use as an input to a third analog crossbar circuit.
14 . The method of claim 12 , wherein each crossbar circuit of the plurality of interconnected analog crossbar circuits other than the first crossbar circuit is configured to receive as an input (i) an analog output generated by a preceding analog crossbar circuit or (ii) an analog output generated by the at least one array of analog signal amplifiers.
15 . A non-transitory computer storage medium encoded with a computer program, the program comprising instructions that are operable, when executed by a data processing apparatus, to cause the data processing apparatus to perform the operations comprising:
configuring a plurality of interconnected analog crossbar circuits comprising a first analog crossbar circuit, a last analog crossbar circuit, and a set of intermediary analog crossbar circuits between the first analog crossbar circuit and the last analog crossbar circuit, wherein:
each interconnected analog crossbar circuit corresponds to a respective layer of a neural network and includes a plurality of crosspoints, each crosspoint storing a weight of a plurality of weights associated with the respective layer of the neural network,
wherein each analog crossbar circuit in the set of intermediary analog circuits receives an analog input from a preceding analog crossbar circuit and provides an analog output to a subsequent analog crossbar circuit;
configuring a single digital-to-analog conversion (DAC) unit to convert a digital input vector into a first analog signal that is provided as an input to the first analog crossbar circuit; and
configuring a single analog-to-digital conversion (ADC) unit to receive as an input a second analog signal from an output of the last analog crossbar circuit and convert the second analog signal into a digital output vector.
16 . The media of claim 15 , wherein at least one analog crossbar circuit in the plurality of interconnected analog crossbar circuits is configured to perform matrix multiplication operations on an analog signal received by the at least one analog crossbar circuit based on the weights stored by the crosspoints of the at least one analog crossbar circuit.
17 . The media of claim 15 , wherein the neural network is a fully-connected neural network.
18 . The media of claim 15 , wherein each crossbar circuit of the plurality of interconnected analog crossbar circuits other than the first crossbar circuit is configured to receive as input an analog output generated by a preceding analog crossbar circuit in the plurality of interconnected analog crossbar circuits.
19 . The media of claim 15 , further comprising:
at least one array of analog signal amplifiers that is positioned between a pair of analog crossbar circuits in the plurality of interconnected analog crossbar circuits.
20 . The media of claim 19 , wherein the at least one array of analog signal amplifiers is configured to (i) receive as an input an analog output generated by a second analog crossbar circuit and (ii) generate as an analog output for use as an input to a third analog crossbar circuit.