IP Library › Granted Patent US 12,729,781
Granted Patent B2
US 12,729,781 · App. 18/618,084 · Granted Sep 8, 2026

Normally-open piezoelectric MEMS valve

Inventors: Yi-Hsien Chang (Shetou Township, TW); Fu-Chun Huang (Zhubei City, TW); Po-Chen Yeh (New Taipei City, TW); Ching-Hui Lin (Taichung City, TW); Chao-Hung Chu (Keelung City, TW); Chun-Ren Cheng (Hsin-Chu City, TW); Shih-Fen Huang (Jhubei, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
F16K99/0007F16K99/0048H10N30/01H10N30/2045B81B7/02B81C1/00015B81C1/0015F16K99/0015F16K2099/0074F16K2099/008F16K2200/3052H10N30/2042H10N30/2044
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Quick Facts
Patent No.
US 12,729,781
App. No.
18/618,084
Granted
Sep 8, 2026
Kind
B2
Abstract

Various embodiments of the present disclosure are directed to a normally-open piezoelectric microelectromechanical systems (MEMS) device. A cantilever has a first end overlying and bonded to a substrate and further has a second end, opposite the first end, overlying an actuator cavity. A piezoelectric actuator is on the cantilever. A valve vane is bonded to the second end of the cantilever and further overlies a valve cavity laterally adjacent to the actuator cavity. The cantilever curves downward from the first end to the second end, such that the valve vane is inclined and the valve cavity is open. Actuation of the piezoelectric actuator curves the cantilever upward to close the valve cavity.

Claims (47)

1 . A semiconductor structure, comprising:

a cantilever having a first end overlying and bonded to a substrate and further having a second end, opposite the first end, overlying an actuator cavity;

a piezoelectric actuator on the cantilever; and

a valve vane bonded to the second end of the cantilever and further overlying a valve cavity laterally adjacent to the actuator cavity;

wherein the cantilever has a curved profile at the second end, which is offset from the first end in a direction transverse to a top surface of the substrate.

2 . The semiconductor structure according to claim 1 , wherein the cantilever has a line-shaped top geometry jutting out over the actuator cavity, and wherein the cantilever curves downward from the first end to the second end.

3 . The semiconductor structure according to claim 1 , wherein the piezoelectric actuator is configured to curve the cantilever upward in response to actuation.

4 . The semiconductor structure according to claim 1 , further comprising:

a semiconductor layer overlying the substrate; and

a device dielectric layer overlying the semiconductor layer, wherein the piezoelectric actuator overlies the device dielectric layer, which has compressive stress and applies an outward force along a top surface of the semiconductor layer.

5 . The semiconductor structure according to claim 1 , wherein the piezoelectric actuator comprises a bottom electrode, a piezoelectric layer overlying the bottom electrode, and a top electrode overlying the piezoelectric layer, wherein the bottom electrode and the top electrode have tensile stress, and wherein the piezoelectric layer has compressive stress that counteracts and surpasses the tensile stress.

6 . The semiconductor structure according to claim 4 , further comprising:

an intermetal dielectric (IMD) layer overlying the device dielectric layer and the piezoelectric actuator, wherein the IMD layer has compressive stress.

7 . The semiconductor structure according to claim 1 , wherein the valve vane is configured to close the valve cavity in response to actuation of the piezoelectric actuator.

8 . The semiconductor structure according to claim 1 , wherein the cantilever has a spiral-shaped top geometry in which the second end of the cantilever is at a center of the spiral-shaped top geometry.

9 . The semiconductor structure according to claim 1 , wherein the cantilever comprises a plurality of line-shaped segments elongated in parallel and coupled end to end to form a meandering path that meanders from the first end to the second end.

10 . A semiconductor structure, comprising:

a cantilever having a first end overlying and bonded to a substrate and further having a second end, opposite the first end, overlying an actuator cavity;

a piezoelectric actuator on the cantilever; and

a valve vane overlying and bonded to the second end of the cantilever, wherein a top surface of the valve vane is inclined upward, relative to a top surface of the substrate, from a location directly over the second end of the cantilever.

11 . The semiconductor structure according to claim 10 , wherein the cantilever intrinsically curves downward from the first end to the second end.

12 . The semiconductor structure according to claim 10 , wherein a valve cavity extends through the substrate, laterally spaced from the actuator cavity, wherein the valve vane has a first protrusion and a second protrusion, wherein the first protrusion overlies and is bonded to the second end of the cantilever on a first side of the valve cavity, and wherein the second protrusion is on a second side of the valve cavity opposite the first side.

13 . The semiconductor structure according to claim 10 , further comprising:

a microelectromechanical systems (MEMS) die comprising the cantilever and the piezoelectric actuator, and in which the actuator cavity is arranged; and

a seal neighboring the MEMS die, wherein the seal and the MEMS die demarcate a valve cavity underlying the valve vane.

14 . The semiconductor structure according to claim 13 , further comprising:

a printed circuit board (PCB) on which the MEMS die and the seal are mounted, wherein the PCB has a pair of openings respectively underlying the actuator cavity and the valve cavity.

15 . A method for forming a semiconductor structure, comprising:

providing a semiconductor layer overlying and spaced from a substrate;

depositing a device dielectric layer over the semiconductor layer;

forming a piezoelectric actuator over the device dielectric layer;

patterning the semiconductor layer and the device dielectric layer to demarcate a cantilever underlying the piezoelectric actuator;

bonding a valve vane to the cantilever;

patterning the substrate to form an actuator cavity at the cantilever, wherein the cantilever has a planar profile upon completing formation of the actuator cavity; and

releasing the cantilever, wherein cantilever transitions from the planar profile to a curved profile during the releasing.

16 . The method according to claim 15 , wherein the valve vane is bonded to the cantilever before forming the actuator cavity, and wherein the method further comprises:

depositing a sacrificial layer around the cantilever and the valve vane after the patterning to form the actuator cavity, wherein the releasing comprises removing the sacrificial layer.

17 . The method according to claim 15 , further comprising:

patterning the substrate to form a valve cavity laterally separated from the actuator cavity, wherein the patterning to form the valve cavity is after the bonding.

18 . The method according to claim 15 , further comprising:

forming a cantilever bond pad on the device dielectric layer, adjacent to the piezoelectric actuator, wherein the cantilever is formed underlying the cantilever bond pad; and

forming the valve vane comprising a pad protrusion lined by a vane bond pad and further comprising a stopper protrusion, wherein the bonding comprises arranging the cantilever bond pad and the vane bond pad into direct contact.

19 . The method according to claim 15 , further comprising:

depositing a sacrificial layer over the piezoelectric actuator and the cantilever before forming the actuator cavity, wherein the valve vane is bonded to the cantilever after forming the actuator cavity, and wherein the releasing comprises removing the sacrificial layer.

20 . The method according to claim 15 , further comprising:

dicing the substrate to form a die, which comprises the cantilever, the piezoelectric actuator, and the actuator cavity; and

mounting the die to a printed circuit board (PCB), neighboring a seal ring, wherein the bonding is performed after the mounting.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2024
From: CHANG, YI-HSIEN; HUANG, FU-CHUN; YEH, PO-CHEN; LIN, CHING-HUI; CHU, CHAO-HUNG; CHENG, CHUN-REN; HUANG, SHIH-FEN
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 067136/0359 →
Continuity (2)
Provisional Application 63612547 · Dec 20, 2023
Related Publication 20250207687A1 · Jun 26, 2025
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