Granted Patent B2

US 12,652,039 · App. 18/625,904 · Granted Jun 9, 2026

Inventors: Taha Soliman (Renningen, DE); Tobias Kirchner (Ludwigsburg, DE)

Assignee: ROBERT BOSCH GMBH

H03K17/162H03K17/302H03K17/687H03K19/018514

Abstract

Claims (51)

1 . A method for processing input variables, comprising the following steps:

applying a first input variable to a control electrode of a first transistor; and

applying a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable, and

wherein the second input variable is a binary variable, and wherein the second input variable characterizes a sign, the sign being “plus” or “minus”.

2 . The method according to claim 1 , further comprising:

ascertaining an output variable based on at least one of the following elements:

a) a variable that characterizes a current flowing through the first circuit node, b) a variable that characterizes a current flowing through the second circuit node.

3 . The method according to claim 2 , further comprising:

ascertaining the variable that characterizes the current flowing through the first circuit node using a first current-based analog-to-digital converter device; and

ascertaining the variable that characterizes the current flowing through the second circuit node using a second current-based analog-to-digital converter device.

4 . The method according to claim 2 , further comprising:

ascertainment a difference between the variable that characterizes the current flowing through the first circuit node and the variable that characterizes the current flowing through the second circuit node, using a differential current-based analog-to-digital converter device.

5 . The method according to claim 1 , wherein the first input variable is a binary variable.

6 . The method according to claim 1 , further comprising:

applying the first input variable to a control electrode of a second transistor, wherein the current leakage device is configured to, when the second input variable has a first state, connect the load path of the first transistor to the first circuit node and a load path of the second transistor to the second circuit node, and wherein the current leakage device is configured to, when the second input variable has a second state, connect the load path of the first transistor to the second circuit node and the load path of the second transistor to the first circuit node.

7 . The method according to claim 6 , wherein a field effect transistor is used as the first transistor and/or the second transistor.

8 . The method according to claim 6 , wherein a ferroelectric field effect transistor is used as the first transistor and/or as the second transistor.

9 . The method according to claim 8 , further comprising at least one of the following elements: a) setting a threshold voltage of at least the first transistor based on the first input variable, b) setting a threshold voltage of the first transistor to a first comparatively low value, c) setting a threshold voltage of the second transistor to a second comparatively high value.

10 . A method for processing input variables, comprising the following steps:

applying a first input variable to a control electrode of a first transistor;

applying a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable;

encoding a magnitude of a ternary variable using at least the first transistor and/or the first input variable; and

encoding a sign of the ternary variable using the second input variable.

11 . An apparatus configured to process input variables, the apparatus configured to:

apply a first input variable to a control electrode of a first transistor; and

apply a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable, and

wherein the second input variable is a binary variable, and wherein the second input variable characterizes a sign, the sign being “plus” or “minus”.

12 . The apparatus according to claim 11 , wherein the apparatus comprising the first transistor, and the current leakage device, and a control apparatus for controlling the applying of the first input variable and/or the applying of the second input variable.

13 . The apparatus according to claim 11 , wherein a second transistor is provided, wherein the first input variable can be applied to control electrodes of the first transistor and of the second transistor, and wherein the control electrodes of the first transistor and of the second transistor are connected to one another.

14 . The apparatus according to claim 13 , wherein a) a first terminal of a load path of the first transistor is connected to a first terminal of the current leakage device, and/or b) a second terminal of a load path of the first transistor is connected to a first reference potential, and/or c) a first terminal of a load path of the second transistor is connected to a second terminal of the current leakage device, and/or d) a second terminal of a load path of the second transistor is connected to the first reference potential.

15 . The apparatus according to claim 14 , wherein the current leakage device includes a first transistor, wherein the first terminal of the current leakage device can be selectively connected to the second circuit node by the first transistor based on the second input variable, wherein the current leakage device has a second transistor, wherein the first terminal of the current leakage device can be selectively connected to the first circuit node by the second transistor based on the second input variable.

16 . An apparatus configured to process input variables, the apparatus configured to:

apply a first input variable to a control electrode of a first transistor; and

apply a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable,

wherein a second transistor is provided, wherein the first input variable can be applied to control electrodes of the first transistor and of the second transistor, and wherein the control electrodes of the first transistor and of the second transistor are connected to one another,

wherein a) a first terminal of a load path of the first transistor is connected to a first terminal of the current leakage device, and/or b) a second terminal of a load path of the first transistor is connected to a first reference potential, and/or c) a first terminal of a load path of the second transistor is connected to a second terminal of the current leakage device, and/or d) a second terminal of a load path of the second transistor is connected to the first reference potential,

wherein the current leakage device includes a first transistor, wherein the first terminal of the current leakage device can be selectively connected to the second circuit node by the first transistor based on the second input variable, wherein the current leakage device has a second transistor, wherein the first terminal of the current leakage device can be selectively connected to the first circuit node by the second transistor based on the second input variable, and

wherein the current leakage device has a third transistor, wherein the second terminal of the current leakage device can be selectively connected to the second circuit node by the third transistor based on the second input variable, wherein the current leakage device has a fourth transistor, wherein the second terminal of the current leakage device can be selectively connected to the first circuit node by the fourth transistor based on the second input variable.

17 . A computing device, comprising:

an apparatus configured to process input variables, the apparatus configured to:

apply a first input variable to a control electrode of a first transistor; and

apply a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable, and

wherein the second input variable is a binary variable, and wherein the second input variable characterizes a sign, the sign being “plus” or “minus”.

18 . A non-transitory computer-readable storage medium on which are stored commands for processing input variables, the commands, when executed by a computer, causing the computer to perform the following steps:

applying a first input variable to a control electrode of a first transistor; and

applying a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable, and

wherein the second input variable is a binary variable, and wherein the second input variable characterizes a sign, the sign being “plus” or “minus”.

19 . An apparatus configured to process input variables, the apparatus configured to:

apply a first input variable to a control electrode of a first transistor; and

apply a second input variable to a current leakage device, wherein the current leakage device is configured to connect a load path of the first transistor selectively to a first circuit node or a second circuit node based on the second input variable, and

wherein the apparatus is used for: a) encoding ternary values including weights, b) providing a circuit for carrying out binary or ternary multiplication and/or accumulation operations, c) use of transistors for carrying out ternary multiplication and/or accumulation operations, d) hardware-based acceleration of an inference of a ternary artificial neural network.

Assignments (1)

Priority Claims (1)

Continuity (1)

References Cited (9)