IP Library › Granted Patent US 12,635,546
Granted Patent B2
US 12,635,546 · App. 18/628,565 · Granted May 19, 2026

Electronic device

Inventors: Chun-Kai Chang (Kaohsiung, TW); Hao-Chih Hsieh (Kaohsiung, TW); Chao Wei Liu (Kaohsiung, TW)
Assignee: Advanced Semiconductor Engineering, Inc.
H01L23/5386
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Quick Facts
Patent No.
US 12,635,546
App. No.
18/628,565
Granted
May 19, 2026
Kind
B2
Abstract

An electronic device is provided. The electronic device includes a carrier and a protection layer. The carrier has a predetermined region and includes a pad disposed in the predetermined region. The protection layer is disposed over the carrier and defines the predetermined region. The protection layer is configured to block an encapsulation layer from covering the pad.

Claims (16)

1 . An electronic device, comprising: a carrier having a predetermined region and comprising a pad disposed in the predetermined region; and a protection layer disposed over the carrier and defining the predetermined region, wherein the protection layer is configured to block an encapsulation layer from covering the pad, wherein in a cross-sectional view, the protection layer comprises a blocking structure disposed at opposite two sides of the pad, the blocking structure defines a recess, the blocking structure is covered by the encapsulation layer and a portion of the blocking structure is exposed by the encapsulation layer.

2 . The electronic device of claim 1 , wherein the blocking structure is spaced apart from the pad.

3 . The electronic device of claim 1 , wherein a first elevation of a top surface of the pad is lower than a second elevation of the recess with respect to a surface of the carrier facing away from the protection layer.

4 . The electronic device of claim 1 , wherein, in the cross-sectional view, a width of the recess is greater than a depth of the recess.

5 . The electronic device of claim 1 , wherein the carrier comprises a conductive layer defines a trench and the pad, wherein the blocking structure is disposed within and above the trench.

6 . The electronic device of claim 1 , wherein the blocking structure has a curved surface.

7 . An electronic device, comprising: a carrier comprising a plurality of pads; an encapsulation layer covering a periphery region of the carrier, wherein, in a top view, a portion of the encapsulation layer is disposed at a periphery area of at least one pad of the pads; and a protection layer disposed between the carrier and the encapsulation layer, wherein the protection layer has a first recess and a second recess between which the encapsulation layer extends, wherein the encapsulation layer further extends into the first recess and the second recess.

8 . The electronic device of claim 7 , wherein, in the top view, the portion of the encapsulation layer has an inner contour substantially identical to an outer contour of the at least one pad.

9 . The electronic device of claim 8 , wherein, in the top view, the inner contour of the portion of the encapsulation layer has a first curvature substantially identical to a second curvature of the outer contour of the at least one pad.

10 . The electronic device of claim 7 , wherein, in the top view, the encapsulation layer is disposed between the plurality of pads.

11 . The electronic device of claim 7 , further comprising a blocking structure adjacent to the plurality of pads, wherein a thickness of the encapsulation layer is thicker at one side closer to the blocking structure.

12 . The electronic device of claim 7 , further comprising a blocking structure adjacent to the plurality of pads, wherein a thickness of the encapsulation layer is taper at one side closer to the blocking structure.

13 . An electronic device, comprising:

a protection layer comprising an opening and a blocking structure configured to block an encapsulation layer from entering the opening; and a connection element disposed in the opening and configured to connect an external device other than the electronic device, wherein the protection layer comprises a plurality of recesses, wherein the opening is disposed between the recesses, wherein the plurality of recesses are filled with the encapsulation layer.

14 . The electronic device of claim 13 , further comprising a conductive pad exposed by the opening and connected to the connection element.

15 . The electronic device of claim 14 , wherein a portion of the conductive pad is covered by the protection layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 5, 2024
From: CHANG, CHUN-KAI; HSIEH, HAO-CHIH; LIU, CHAO WEI
To: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
Reel/Frame 067025/0113 →
Continuity (1)
Related Publication 20250316604A1 · Oct 9, 2025
References Cited (7)
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