Granted Patent B2

US 12,602,187 · App. 18/630,776 · Granted Apr 14, 2026

Inventors: Dongyang Li (Milpitas, CA); Andrew Chang (Los Altos, CA)

Assignee: Samsung Electronics Co., Ltd.

G06F3/0659G06F3/0604G06F3/0683

Abstract

Claims (44)

1 . A method comprising:

advertising, by a memory device, a first portion of a volatile memory of the memory device as a first type of memory having a first size, and a second portion of the volatile memory as a second type of memory different from the first type of memory, the second portion having a second size, wherein the first type of memory is configured to emulate a persistent memory;

receiving, by the memory device, a command from a computing device;

identifying, by the memory device, a memory address and a type of memory access associated with the command;

storing, by the memory device in the first portion of the volatile memory of the memory device, the memory address and identification of the type of memory access;

providing a notification for the computing device;

based the notification, receiving by the memory device a request for information stored in the first portion of the volatile memory; and

providing, based on the request, the memory address and the identification of the type of memory access for processing by the computing device to make a configuration decision for the second portion of the volatile memory.

2 . The method of claim 1 , wherein the command is for reading or writing second data from or to a non-volatile memory of the memory device, and the memory address identifies a physical address associated with the second data.

3 . The method of claim 2 , further comprising: accessing the second portion of the volatile memory is based on detecting the command.

4 . The method of claim 1 , wherein the command is for performing a computation by the memory device, the method further comprising:

identifying, by the memory device, a result of the computation; and

storing, by the memory device, the result of the computation in the first portion of the volatile memory.

5 . The method of claim 1 , further comprising:

detecting, by the memory device, fullness of the first portion of the volatile memory; and

generating, by the memory device, the notification based on the detecting of the fullness of the first portion of the volatile memory.

6 . The method of claim 1 , wherein the first portion of the volatile memory is mapped to a first physical address space of the computing device and accessed by the computing device via a memory access operation.

7 . The method of claim 1 , wherein the memory device is configured to transmit second data to the computing device based on accessing the second portion of the volatile memory.

8 . The method of claim 1 , wherein the configuration decision includes reconfiguring the second portion of the volatile memory for increasing a cache hit ratio.

9 . The method of claim 8 , wherein the reconfiguring of the second portion includes modifying a cache algorithm.

10 . A memory device comprising:

a controller;

a volatile memory; and

a non-volatile memory,

wherein the controller is configured to:

advertise a first portion of the volatile memory as a first type of memory having a first size, and a second portion of the volatile memory as a second type of memory different from the first type of memory, the second portion having a second size, wherein the first type of memory is configured to emulate a persistent memory;

receive a command from a computing device;

identify a memory address and a type of memory access associated with the command;

store the memory address and identification of the type of memory access in the first portion of the volatile memory;

provide a notification for the computing device;

based the notification, receive a request for information stored in the first portion of the volatile memory; and

provide, based on the request, the memory address and the identification of the type of memory access for processing by the computing device to make a configuration decision for the second portion of the volatile memory.

11 . The memory device of claim 10 , wherein the command is for reading or writing second data from or to a non-volatile memory of the memory device, and the memory address identifies a physical address associated with the second data.

12 . The memory device of claim 11 , wherein the controller is further configured to access the second portion of the volatile memory is based on the controller being configured to detect the command.

13 . The memory device of claim 10 , wherein the command is for performing a computation by the memory device, and the controller is further configured to:

identify a result of the computation; and

store the result of the computation in the first portion of the volatile memory.

14 . The memory device of claim 10 , wherein the controller is further configured to:

detect fullness of the first portion of the volatile memory; and

generate the notification based on the detecting of the fullness of the first portion of the volatile memory.

15 . The memory device of claim 10 , wherein the first portion of the volatile memory is mapped to a first physical address space of the computing device and is configured to be accessed by the computing device via a memory access operation.

16 . The memory device of claim 10 , wherein the controller is further configured to transmit second data to the computing device based on accessing the second portion of the volatile memory.

17 . The memory device of claim 10 , wherein the configuration decision includes reconfiguring the second portion of the volatile memory for increasing a cache hit ratio.

18 . The memory device of claim 17 , wherein the reconfiguring of the second portion includes modifying a cache algorithm.

Assignments (1)

Continuity (2)

References Cited (20)