IP Library Granted Patent US 12,340,774
Granted Patent B2
US 12,340,774 · App. 18/633,011 · Granted Jun 24, 2025

Electro-optical device

Inventors: Katsuya Anzai (Anpachi-cho, JP); Hideki Kawada (Anpachi-cho, JP); Hiroshi Matsuda (Gifu, JP); Yukitada Iwasaki (Mizuho, JP)
Assignee: Japan Display Inc.
G09G3/3677G09G3/2096G09G3/3225G09G3/3266G09G3/3275G09G3/3648G09G3/3688G09G2300/0408G09G2300/0426G09G2300/0465G09G2310/0232H10K59/131
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Quick Facts
Patent No.
US 12,340,774
App. No.
18/633,011
Granted
Jun 24, 2025
Kind
B2
Abstract

An electro-optical device is provided and includes a plurality of first signal lines extending in a first direction on a substrate; a plurality of second signal lines extending in a second direction on the substrate, the second direction intersecting the first direction; a pixel area in which a plurality of pixel electrodes are disposed; an outer peripheral edge of the pixel area having a curved portion or a bent portion; and a first circuit block, a second circuit block, and a third circuit block arranged along the outer peripheral edge, wherein the second circuit block is arranged between the first circuit block and the first circuit block, and a first gap between the first circuit bock and the second circuit block is different from a second gap between the second circuit block and the third circuit block.

Claims (50)

1. An electro-optical device comprising:

a substrate;

a pixel area with an outer peripheral edge including a curved portion;

pixels in the pixel area;

a first gate line and a second gate line, each connected to a corresponding one of the pixels on the substrate;

a first circuit block and a second circuit block which are arranged outside the pixel area and along the curved portion of the pixel area;

a first relay line and a first output line connecting the first gate line and the first circuit block, the first circuit block, the first output line, the first relay line, and the first gate line are connected in the order as listed; and

a second relay line and a second output line connecting the second gate line and the second circuit block, the second circuit block, the second output line, the second relay line, and the second gate line are connected in the order as listed,

wherein both the first circuit block and the second circuit block include a shift register and a buffer,

both the first circuit block and the second circuit block are connected to a corresponding one of the first and second output lines,

the first relay line extends from the first output line to the first gate line in a first direction,

the second relay line extends from the second output line to the second gate line in a second direction, and

the first direction is opposite to the second direction.

2. The electro-optical device according to claim 1 , wherein

the first direction is parallel to the second direction.

3. The electro-optical device according to claim 1 , wherein

a length of the first relay line is different from a length of the second relay line.

4. The electro-optical device according to claim 1 , further comprising a third gate line connected to a corresponding one of the pixels, wherein

the third gate line is disposed between the first gate line and the second gate line.

5. The electro-optical device according to claim 1 , further comprising third gate lines each connected to a corresponding one of the pixels, wherein

the third gate lines are disposed between the first gate line and the second gate line.

6. The electro-optical device according to claim 5 , wherein

some of the third gate lines are connected to the first circuit block, and

others of the third gate lines are connected to the second circuit block.

7. An electro-optical device comprising:

a substrate;

a pixel area with an outer peripheral edge including a curved portion;

pixels in the pixel area;

a first gate line and a second gate line, each connected to a corresponding one of the pixels on the substrate;

a circuit block arranged outside the pixel area and along the curved portion of the pixel area;

a first relay line and a first output line connecting the first gate line and the circuit block, the circuit block, the first output line, the first relay line, and the first gate line are connected in the order as listed; and

a second relay line and a second output line connecting the second gate line and the circuit block, the circuit block, the second output line, the second relay line, and the second gate line are connected in the order as listed,

wherein the circuit block includes a shift register and a buffer,

the circuit block is connected to the first and second output lines,

the first relay line extends from the first output line to the first gate line in a first direction,

the second relay line extends from the second output line to the second gate line in a second direction, and

the first direction is opposite to the second direction.

8. The electro-optical device according to claim 7 , wherein

the first direction is parallel to the second direction.

9. The electro-optical device according to claim 7 , wherein

a length of the first relay line is different from a length of the second relay line.

10. The electro-optical device according to claim 7 , further comprising a third gate line connected to a corresponding one of the pixels, wherein

the third gate line is disposed between the first gate line and the second gate line.

11. The electro-optical device according to claim 7 , further comprising third gate lines each connected to a corresponding one of the pixels, wherein

the third gate lines are disposed between the first gate line and the second gate line.

12. The electro-optical device according to claim 11 , wherein

some of the third gate lines are connected to third relay lines, respectively,

others of the third gate lines are connected to fourth relay lines, respectively,

each of the third relay lines extends to a corresponding one of the third gate lines in the first direction, and

each of the fourth relay lines extends to a corresponding one of the third gate lines in the second direction.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2025
From: JAPAN DISPLAY INC.
To: MAGNOLIA WHITE CORPORATION
Reel/Frame 071793/0491 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2025
From: ANZAI, KATSUYA; KAWADA, HIDEKI; MATSUDA, HIROSHI; IWASAKI, YUKITADA
To: EPSON IMAGING DEVICES CORPORATION
Reel/Frame 071324/0340 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2025
From: SONY CORPORATION
To: JAPAN DISPLAY WEST INC.
Reel/Frame 071324/0508 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 22, 2025
From: EPSON IMAGING DEVICES CORPORATION
To: SONY CORPORATION
Reel/Frame 069964/0125 →
CHANGE OF NAME Recorded Jan 22, 2025
From: JAPAN DISPLAY WEST INC.
To: JAPAN DISPLAY INC.
Reel/Frame 069988/0822 →
Priority Claims (4)
JP 2007-274733 · Oct 23, 2007 · national
JP 2007-291596 · Nov 9, 2007 · national
JP 2008-164114 · Jun 24, 2008 · national
JP 2008-164115 · Jun 24, 2008 · national
Continuity (7)
Continuation 18204482 · Jun 1, 2023
Continuation 17876951 · Jul 29, 2022
Continuation 17371846 · Jul 9, 2021
Continuation 16906807 · Jun 19, 2020
Continuation 15453484 · Mar 8, 2017
Continuation 12211425 · Sep 16, 2008
Related Publication 20240257783A1 · Aug 1, 2024
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