IP Library Granted Patent US 12,431,333
Granted Patent B2
US 12,431,333 · App. 18/663,041 · Granted Sep 30, 2025

Systems, devices, and methods for aligning a particle beam and performing a non-contact electrical measurement on a cell and/or non-contact electrical measurement cell vehicle using a registration cell

Inventors: Indranil De (Alameda, CA); Jeremy Cheng (San Jose, CA); Thomas Sokollik (Santa Clara, CA); Yoram Schwarz (Santa Clara, CA); Stephen Lam (Fremont, CA); Xumin Shen (Santa Clara, CA)
Assignee: PDF SOLUTIONS, INC.
H01J37/3175G01R31/2653G01R31/306H01J37/3005H01J2237/31762
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Quick Facts
Patent No.
US 12,431,333
App. No.
18/663,041
Granted
Sep 30, 2025
Kind
B2
Abstract

Systems, devices, and methods for performing a non-contact electrical measurement (NCEM) on a NCEM-enabled cell included in a NCEM-enabled cell vehicle may be configured to perform NCEMs while the NCEM-enabled cell vehicle is moving. The movement may be due to vibrations in the system and/or movement of a movable stage on which the NCEM-enabled cell vehicle is positioned. Position information for an electron beam column producing the electron beam performing the NCEMs and/or for the moving stage may be used to align the electron beam with targets on the NCEM-enabled cell vehicle while it is moving.

Claims (36)

1. A computer-readable medium storing a set of instructions thereon, which when executed by a processor cause the processor to:

receive a recipe for a die included in a wafer, the die including a plurality of chips, each chip of the plurality of chips being divided into a plurality of tiles, each tile including a non-contact electronic measurement (NCEM)-enabled NCEM-enabled registration cell and a plurality of NCEM-enabled fill cells, the recipe including a position for the die within the wafer, a position of the NCEM-enabled registration cell, and a position of each NCEM-enabled cell of the plurality NCEM-enabled cells;

determine an expected position of a NCEM-enabled registration cell included a tile of the plurality of tiles;

direct an electron beam toward the NCEM-enabled registration cell;

receive an indication of a response of the NCEM-enabled registration cell to the electron beam;

determine an actual position of the NCEM-enabled registration cell using the response;

align the electron beam using the actual position of the NCEM-enabled registration cell;

direct the aligned electron beam toward an NCEM-enabled fill cell of the plurality of NCEM-enabled fill cells;

receive a response of the NCEM-enabled fill cell to the aligned electron beam; and

provide an indication of the response to a processor.

2. The computer-readable medium of claim 1 , wherein the NCEM-enabled registration cell comprises:

a substrate;

a power rail electrically coupled to a power supply and mechanically coupled to the substrate;

a ground rail electrically coupled to a ground and mechanically coupled to the substrate; and

a floating feature mechanically, but not electrically, coupled to the substrate, the floating feature being configured to provide an easily distinguishable feature when exposed to a non-contact electrical measurement.

3. A computer-readable medium storing a set of instructions thereon, which when executed by a processor cause the processor to:

receive a recipe for a die included in a wafer, each die of the plurality of chips being divided into a plurality of tiles, each tile including a NCEM-enabled registration cell and a plurality of non-contact electronic measurement (NCEM)-enabled fill cells, the recipe including a position for the die within the wafer and a position for each of the NCEM-enabled fill cell of the plurality of NCEM-enabled fill cells;

determine an expected position of a NCEM-enabled registration cell included in a tile of the plurality of tiles;

scan the NCEM-enabled registration cell using an electron beam;

receive an indication of a response of the NCEM-enabled registration cell to the scanning;

determine an actual position of the NCEM-enabled registration cell using the response;

align the electron beam using the actual position of the NCEM-enabled registration cell;

sequentially direct the aligned electron beam toward each of NCEM-enabled fill cells of the plurality of NCEM-enabled fill cells within the tile of the plurality of tiles;

receive an indication of a response of each of the NCEM-enabled fill cells to the aligned electron beam; and

provide an indication of the response to a processor.

4. The method of claim 3 , wherein responses of NCEM-enabled fill cells to the electron beam are received from a plurality of tiles of in an array of chips included in the wafer, each respective tile and chip of the array being configured to be identical to one another and the set of instructions, which when executed by the processor further cause the processor to:

compare the received responses to one another to determine whether there are any outlying responses; and

provide a result of the comparison to a processor.

5. A computer-readable medium storing a set of instructions thereon, which when executed by a processor cause the processor to:

receive a recipe for a die included in a wafer, the die including a plurality of chips, each of the chips being divided into a plurality of tiles, each tile including a NCEM-enabled registration cell and a plurality of non-contact electronic measurement (NCEM)-enabled fill cells, the recipe including a position for the die within the wafer, contents of the wafer, and a position for the contents of the wafer;

receive a selection of an array of chips included in the wafer to test using a non-contact electronic measurement (NCEM), each chip of the array being configured to be identical to one another;

identify a target region in each of the chips included in the array,

direct an electron beam toward the target region for each chip in the array;

receive an indication of a response of each target region to the electron beam;

compare the received indications to one another to determine whether there are any outlying indications; and

provide a result of the comparison to a processor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2024
From: DE, INDRANIL; CHENG, JEREMY; SOKOLLIK, THOMAS; SCHWARZ, YORAM; LAM, STEPHEN; SHEN, XUMIN
To: PDF SOLUTIONS, INC.
Reel/Frame 067877/0879 →
Continuity (6)
Continuation 18108583 · Feb 11, 2023
Continuation 17739063 · May 6, 2022
Continuation 17061401 · Oct 1, 2020
Provisional Application 62945558 · Dec 9, 2019
Provisional Application 62909046 · Oct 1, 2019
Related Publication 20240304414A1 · Sep 12, 2024
References Cited (37)
US 3761721A · Altshuler et al. · 1973 [cited by applicant]
US 5298755A · Wuest et al. · 1994 [cited by applicant]
US 5716742A · Doran · 1998 [cited by applicant]
US 6040583A · Onoda · 2000 [cited by applicant]
US 6541759B1 · Hill · 2003 [cited by applicant]
US 6771077B2 · Hamamura et al. · 2004 [cited by applicant]
US 6856402B2 · Hill · 2005 [cited by applicant]
US 7109483B2 · Nakasuji et al. · 2006 [cited by applicant]
US 7683317B2 · Shemesh · 2010 [cited by applicant]
US 8211596B2 · Holmes · 2012 [cited by applicant]
US 8384048B2 · Wiesner · 2013 [cited by applicant]
US 8946628B2 · Harada et al. · 2015 [cited by applicant]
US 9000395B2 · Ren et al. · 2015 [cited by applicant]
US 9443696B2 · Jiang et al. · 2016 [cited by applicant]
US 20020093350A1 · Yamada · 2002 [cited by examiner]
US 20060218517A1 · Siegler et al. · 2006 [cited by applicant]
US 20080267489A1 · Xiao · 2008 [cited by examiner]
US 20090102501A1 · Guldi et al. · 2009 [cited by applicant]
US 20100006896A1 · Uemura · 2010 [cited by applicant]
US 20100258798A1 · Sokel et al. · 2010 [cited by applicant]
US 20110072407A1 · Keinert et al. · 2011 [cited by applicant]
US 20120116703A1 · Pavillon et al. · 2012 [cited by applicant]
US 20130300454A1 · DiMarzio et al. · 2013 [cited by applicant]
US 20140299767A1 · Bizen et al. · 2014 [cited by applicant]
US 20160276128A1 · Ikeda et al. · 2016 [cited by applicant]
E. Menzel, “Electron Beam Testing Techniques,” Microelectronic Engineering 16, Elsevier, 1992. [cited by applicant]
E. Wolfgang, “Electron beam testing,” Microelectronic Engineering 4, North-Holland, 1986. [cited by applicant]
FJ Hohn, et al., “Electron Beam Testing And Its Application To Packaging Modules For Very Large Scale Integrated (VLSI) Chip Arrays,” Proc. SPIE 0333, Submicron Lithography I, Jun. 30, 1982. [cited by applicant]
Hess, Christopher et al. “Logic Characterization Vehicle to Determine Process Variation Impact on Yield and Performance of Digital Circuits”, IEEE 2002 Int. Conference on Microelectronic Test Structures, vol. 15, Apr. 2… [cited by applicant]
Huber et al. “Characterization of Printed Circuit Board Material & Manufacturing Technology for High Frequency”, IPC Apex Expo Conference Proceedings, 2015. [cited by applicant]
International Search Report for PCT/US2016/067050, Published Dec. 11, 2017. [cited by applicant]
JTL Thong, ed., “Electron Beam Testing Technology,” Springer, 1993. [cited by applicant]
M. Bolorizadeh, “The Effects of Fast Secondary Electrons on Low Voltage Electron Beam Lithography,” PhD diss., University of Tennessee, 2006. [cited by applicant]
McDermott et al. “Long Term Thermal Reliability of Printed Circuit Board Materials”, IPC Apex Expo Conference Proceedings. [cited by applicant]
Qi et al. “Effects of Printed Circuit Board Materials on Lead-free Interconnect Durability”, 5th International Conference on Polymers and Adhesives in Microelectronics and Photonics, 2005. [cited by applicant]
Rakov, Aleksei. “Wideband characterization of printed circuit board materials up to 50 GHz.” Missouri University of Science and Technology—Master's Thesis, 2013. [cited by applicant]
SCJ Garth, “Electron beam testing of ultra large scale integrated circuits,” Microelectronic Engineering 4, North-Holland, 1986. [cited by applicant]