BIOS verification as part of HROT in BMC firmware in a secured server system

1 . A method of operation of a baseboard management controller (BMC), comprising:

holding a host computer in a reset state by asserting a reset signal to the host computer;

accessing an initial boot block (IBB) of a BIOS image of the host computer from a storage device shared between the BMC and the host computer while the host computer is held in the reset state, wherein the BIOS image is protected based on a private key of a public key/private key pair, wherein the IBB holds X and Y components of a public key of the public key/private key pair, the X and Y components being a compressed form of an elliptic curve (EC) based public key representing coordinates on an elliptic curve;

validating the IBB of the BIOS image based on the public key of the public key/private key pair, the validating comprising: deriving the public key from the X and Y components stored in the IBB, generating a hash of the derived public key, and comparing the generated hash with a hash of the public key stored in a BMC firmware image of the BMC; and

releasing the reset signal to enable the host computer to start a boot process upon successful validation of the IBB of the BIOS image, wherein upon release of the reset signal, code from the IBB validates remaining BIOS sections of the BIOS image during the boot process of the host computer.

2 . The method of claim 1 , wherein the public key is stored in the BMC firmware image of the BMC.

3 . The method of claim 1 , wherein the validating the IBB of the BIOS image further comprises: verifying an ECDSA signature of the remaining BIOS sections using the public key derived from the X and Y components stored in the IBB; and comparing a hash of a manifest table in the BIOS image with a stored hash in the BIOS image.

4 . The method of claim 1 , wherein the BIOS image is stored in a Serial Peripheral Interface (SPI) storage device.

5 . The method of claim 1 , wherein the IBB is a first section of the BIOS image containing initial code and data required to start execution of a BIOS of the host computer.

6 . The method of claim 1 , wherein when the validation of the remaining BIOS sections fails, the method further comprises: receiving, at the BMC, a notification of the validation failure; and preventing the host computer from booting.

7 . The method of claim 1 , further comprising: verifying BMC firmware by a Hardware Root of Trust (HROT) engine before the validating the IBB of the BIOS image.

8 . A baseboard management controller (BMC) comprising:

a processor; and

a memory storing instructions that, when executed by the processor, cause the BMC to:

hold a host computer in a reset state by asserting a reset signal to the host computer;

access an initial boot block (IBB) of a BIOS image of the host computer from a storage device shared between the BMC and the host computer while the host computer is held in the reset state, wherein the BIOS image is protected based on a private key of a public key/private key pair, wherein the IBB holds X and Y components of a public key of the public key/private key pair, the X and Y components being a compressed form of an elliptic curve (EC) based public key representing coordinates on an elliptic curve;

validate the IBB of the BIOS image based on the public key of the public key/private key pair, the validation comprising: deriving the public key from the X and Y components stored in the IBB, generating a hash of the derived public key, and comparing the generated hash with a hash of the public key stored in a BMC firmware image of the BMC; and

release the reset signal to enable the host computer to start a boot process upon successful validation of the IBB of the BIOS image, wherein upon release of the reset signal, code from the IBB validates remaining BIOS sections of the BIOS image during the boot process of the host computer.

9 . The BMC of claim 8 , wherein the public key is stored in the BMC firmware image of the BMC.

10 . The BMC of claim 8 , wherein the instructions to validate the IBB of the BIOS image further cause the BMC to: verify an ECDSA signature of the remaining BIOS sections using the public key derived from the X and Y components stored in the IBB; and compare a hash of a manifest table in the BIOS image with a stored hash in the BIOS image.

11 . The BMC of claim 8 , wherein the BIOS image is stored in a Serial Peripheral Interface (SPI) storage device.

12 . The BMC of claim 8 , wherein the IBB is a first section of the BIOS image containing initial code and data required to start execution of a BIOS of the host computer.

13 . A non-transitory computer-readable medium storing instructions which when executed by a processor of a baseboard management controller (BMC) cause the BMC to:

hold a host computer in a reset state by asserting a reset signal to the host computer;

access an initial boot block (IBB) of a BIOS image of the host computer from a storage device shared between the BMC and the host computer while the host computer is held in the reset state, wherein the BIOS image is protected based on a private key of a public key/private key pair, wherein the IBB holds X and Y components of a public key of the public key/private key pair, the X and Y components being a compressed form of an elliptic curve (EC) based public key representing coordinates on an elliptic curve;

validate the IBB of the BIOS image based on the public key of the public key/private key pair, the validation comprising: deriving the public key from the X and Y components stored in the IBB, generating a hash of the derived public key, and comparing the generated hash with a hash of the public key stored in a BMC firmware image of the BMC; and

release the reset signal to enable the host computer to start a boot process upon successful validation of the IBB of the BIOS image, wherein upon release of the reset signal, code from the IBB validates remaining BIOS sections of the BIOS image during the boot process of the host computer.