Fully homomorphic encrypted processing acceleration
A device for processing fully homogeneous encrypted data comprises a command input with pipeline stages and a register file coupled to the command input via a non-pipelined stage and an ultimate pipelined stage. Further, the device includes various multiplexers to allow for usage of a multiplier for different command functions. Moreover, the device includes an adder element with a first input coupled to multiplexer outputs, a select line coupled to a penultimate pipeline stage of the command input, and an output coupled to the register file. A command on the command line passes through the pipeline stages as select inputs to the multiplexers to control the function of the multiplexers at that time.
1 . A device for processing fully homogeneous encrypted data, the device comprising:
a command input with pipeline stages;
a register file coupled to the command input via a non-pipelined stage and an ultimate pipelined stage;
a first multiplexer with a first input coupled to the register file, a second input coupled to a data input, and a select coupled to the first pipeline stage of the command input;
a second multiplexer with a first input coupled to the register file, a second input coupled to a first pipeline stage of the command input, and a select coupled to the first pipeline stage of the command input;
a multiplier coupled to outputs of the first multiplexer and the second multiplexer, wherein the multiplier has a predetermined number of pipeline stages;
a third multiplexer with a first input coupled to an output of the multiplier, a second input coupled to the output of the first multiplexer, and a select coupled to a penultimate pipeline stage of the command input;
a fourth multiplexer with a first input coupled to ground, a second input coupled to the output of the second multiplexer, and a select coupled to the penultimate pipeline stage of the command input; and
an adder element with a first input coupled to an output of the third multiplexer, a second input coupled to an output of the fourth multiplexer, a select line coupled to the penultimate pipeline stage of the command input, and an output coupled to the register file.
2 . The device of claim 1 , wherein the adder element is controlled to function as:
an adder when the select line includes a first value, and
an accumulator when the select line includes a second value.
3 . The device of claim 1 , wherein the adder element further includes modular reduction functionality.
4 . The device of claim 1 , wherein the multiplier further includes modular reduction functionality.