Electronic devices, electronic systems, and power supply circuits
Implementations of the present disclosure disclose electronic devices, electronic systems and power supply circuits. An example electronic device includes: a power supply structure including a node, through which a voltage is supplied; and a first circuit having its one end coupled to the node via a first resistor and the other end grounded; and a package structure including a second circuit and a die circuit that are connected in parallel between the node and a grounding node, wherein the second circuit, the first circuit and the first resistor are equivalent to a parallel resistor-inductor-capacitor circuit.
1 . An electronic device, comprising:
a power supply structure comprising: a node through which a voltage is supplied; and a first circuit having one end coupled to the node via a first resistor and another end grounded; and
a package structure comprising a second circuit and a die circuit that are connected in parallel between the node and a grounding node,
wherein the second circuit, the first circuit, and the first resistor are equivalent to a parallel resistor-inductor-capacitor circuit.
2 . The electronic device of claim 1 , wherein the first circuit comprises a first capacitor and a first inductor connected in series.
3 . The electronic device of claim 1 , further comprising
a plurality of first circuits connected in parallel, wherein the first resistor is connected in series with one of the plurality of first circuits nearest to the second circuit.
4 . The electronic device of claim 1 , wherein the second circuit comprises
a second resistor, a second inductor and a second capacitor connected in series, and wherein one end of the second circuit is coupled to the node and the other end of the second circuit is grounded.
5 . The electronic device of claim 1 , wherein the power supply structure further comprises
a third circuit, wherein one end of the third circuit is coupled to the node and another end of the third circuit is grounded, and wherein the third circuit is connected with the first circuit in parallel and comprises a third resistor, a third inductor, and a third capacitor connected in series.
6 . The electronic device of claim 5 , wherein the power supply structure further comprises a voltage generating circuit having its output terminal coupled to the node.
7 . The electronic device of claim 1 , further comprising a fourth inductor through which one end of the second circuit is coupled to the node.
8 . The electronic device of claim 1 , wherein the package structure further comprises a fifth inductor through which the die circuit is coupled to the node.
9 . The electrical device of claim 1 , wherein the first resistor has a resistance value in a range of 0.5 Ohm to 5 Ohm and an operating frequency of the die circuit is in a range of 0 to 300 MHz.
10 . The electronic device of claim 1 , further comprising
a first substrate on which the power supply structure is located,
wherein the package structure further comprises a second substrate, wherein the second circuit is located on and/or in the second substrate, wherein the die circuit is located on the second substrate, and
wherein a surface of the first substrate on a side having the first circuit disposed thereon is fixed to a surface of the second substrate on a side away from the die circuit.
11 . The electronic device of claim 10 , wherein the package structure comprises
a semiconductor device comprising the die circuit,
wherein the semiconductor device is located on the second substrate.
12 . An electronic system, comprising
an electronic device that comprises:
a power supply structure comprising a node through which a voltage is supplied; a first circuit having one end coupled to the node via a first resistor and another end grounded; and
a package structure comprising a second circuit and a die circuit that are connected in parallel between the node and a grounding node,
wherein the second circuit, the first circuit and the first resistor are equivalent to a parallel resistor-inductor-capacitor circuit, and
wherein the package structure comprises at least one of a memory device or a memory controller that is coupled to the memory device and is configured to control the memory device.
13 . A power supply circuit, comprising:
a node through which a package structure is supplied with power; and
a first circuit having one end coupled to the node via a first resistor and another end grounded,
wherein the package structure comprises a second circuit and a die circuit that are connected in parallel between the node and a grounding node, and wherein the second circuit, the first circuit, and the first resistor are equivalent to a parallel resistor-inductor-capacitor circuit.
14 . The power supply circuit of claim 13 , wherein the first circuit comprises a first capacitor and a first inductor connected in series.
15 . The power supply circuit of claim 13 , further comprising
a plurality of first circuits connected in parallel, wherein the first resistor is connected in series with one of the plurality of first circuits nearest to the second circuit.
16 . The power supply circuit of claim 13 , wherein the second circuit comprises
a second resistor, a second inductor, and a second capacitor connected in series, and wherein one end of the second circuit is coupled to the node and the other end of the second circuit is grounded.
17 . The power supply circuit of claim 13 , further comprising
a third circuit, wherein one end of the third circuit is coupled to the node and another end of the third circuit is grounded, and wherein the third circuit is connected with the first circuit in parallel and comprises a third resistor, a third inductor, and a third capacitor connected in series.
18 . The power supply circuit of claim 17 , further comprising a voltage generating circuit having its output terminal coupled to the node.
19 . The power supply circuit of claim 13 , further comprising a fourth inductor through which one end of the second circuit is coupled to the node.
20 . The power supply circuit of claim 13 , wherein the package structure further comprises a fifth inductor through which the die circuit is coupled to the node.