DML DRIVER
A DML driver ( 10 ) includes a PMOS transistor (M 1p ) having a gate connected to a bias voltage (V 2 ), a source connected to a power supply voltage (V 1 ), and a drain connected to the anode of an LD ( 1 ), an NMOS transistor (M 1n ) having a source connected to ground, an inductor (L 1 ) having one end to which a modulated signal (V in ) is input, and the other end connected to the gate of the NMOS transistor (M 1n ), and a resistor (R in ) having one end connected to a bias voltage (V 4 ), and the other end connected to one end of the inductor (L 1 ).
1 . A DML driver comprising:
a first transistor having a gate or base connected to a first bias voltage, a source or emitter connected to a first power supply voltage, and a drain or collector connected to an anode of a laser diode;
a second transistor having a drain or collector connected to the anode of the laser diode, and a source or emitter connected to a second power supply voltage;
an inductor having one end to which a modulated signal is input, and the other end connected to a gate or base of the second transistor; and
a first resistor having one end connected to a second bias voltage, and the other end connected to the one end of the inductor.
2 . The DML driver according to claim 1 , further comprising a third transistor having a gate or base connected to a third bias voltage, and cascode-connected between the anode of the laser diode and the drain or collector of the second transistor.
3 . A DML driver comprising:
a first transistor having a gate or base connected to a first bias voltage, a source or emitter connected to a first power supply voltage, and a drain or collector connected to an anode of a laser diode;
a second transistor having a gate or base connected to a second bias voltage, and a source or emitter connected to a second power supply voltage;
a third transistor cascode-connected between the anode of the laser diode and a drain or collector of the second transistor;
an inductor having one end to which a modulated signal is input, and the other end connected to a gate or base of the third transistor; and
a first resistor having one end connected to a third bias voltage, and the other end connected to the one end of the inductor.
4 . The DML driver according to any one of claims 1 to 3 , further comprising:
a first capacitor having one end connected to the first power supply voltage; and
a second resistor having one end connected to the other end of the first capacitor, and the other end connected to the drain or collector of the first transistor.
5 . The DML driver according to any one of claims 1 to 4 , further comprising a fourth transistor having a gate or base connected to a fourth bias voltage, and cascode-connected between the drain or collector of the first transistor and the anode of the laser diode.
6 . The DML driver according to any one of claims 1 to 5 , further comprising a third resistor inserted between the source or emitter of the second transistor and the second power supply voltage.
7 . The DML driver according to claim 6 , further comprising a second capacitor parallel-connected to the third resistor.