IP Library › Granted Patent US 12,750,607
Granted Patent B2
US 12,750,607 · App. 18/692,136 · Granted Sep 29, 2026

Imaging device and electronic apparatus

Inventor: Takashi Machida (Tokyo, JP)
Assignee: Sony Semiconductor Solutions Corporation
H04N25/772H04N25/768H04N25/78
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Quick Facts
Patent No.
US 12,750,607
App. No.
18/692,136
Granted
Sep 29, 2026
Kind
B2
Abstract

An imaging device according to one embodiment of the present disclosure includes one or more light receiving pixels that generate electric charges according to an amount of received light through photoelectric conversion; one or more analog-to-digital conversion circuits that are provided for each of the light receiving pixels and that convert an analog signal read from each of the one or more light receiving pixels into a digital signal; and a plurality of pixel units each including the one or more light receiving pixels and the one or more analog-to-digital conversion circuits. The plurality of pixel units is disposed to allow the one or more light receiving pixels to be adjacent to each other in two pixel units that are adjacent to each other in a first direction.

Claims (44)

1 . An imaging device comprising:

one or more light receiving pixels that generate electric charges according to an amount of received light through photoelectric conversion;

one or more analog-to-digital conversion circuits that are provided for each of the light receiving pixels and that convert an analog signal read from each of the one or more light receiving pixels into a digital signal; and

a plurality of pixel units each including the one or more light receiving pixels and the one or more analog-to-digital conversion circuits, wherein

the plurality of pixel units is disposed to allow the one or more light receiving pixels to be adjacent to each other in two pixel units that are adjacent to each other in a first direction,

the plurality of pixel units include a first pixel unit, a second pixel unit, a third pixel unit, and a fourth pixel unit that are disposed in sequence in the first direction,

the one or more light receiving pixels are disposed adjacently in the first pixel unit and the second pixel unit that are adjacent to each other and in the third pixel unit and the fourth pixel unit that are adjacent to each other, and respective circuit sections are disposed adjacently in the second pixel unit and the third pixel unit that are adjacent to each other,

the first pixel unit includes a first light receiving pixel and a first floating diffusion layer,

the second pixel unit includes a second light receiving pixel and a second floating diffusion layer,

the first floating diffusion layer and the second floating diffusion layer are disposed at a boundary between the first light receiving pixel and the second light receiving pixel disposed adjacently, and are shared by the first pixel unit and the second pixel unit,

the first pixel unit and the second pixel unit have mutually different exposure timings, and

electric charges generated in the first light receiving pixel and electric charges generated in the second light receiving pixel are analog-added in the first floating diffusion layer and the second floating diffusion layer, respectively, and thereafter, read out to a pixel circuit that outputs a pixel signal based on the electric charges to a corresponding analog-to-digital conversion circuit.

2 . The imaging device according to claim 1 , wherein

the one or more light receiving pixels respectively include one or more floating diffusion layers, and

the one or more floating diffusion layers are shared among the plurality of pixel units disposed to allow the one or more light receiving pixels to be adjacent to each other in the first direction.

3 . The imaging device according to claim 1 , wherein the respective circuit sections include at least a portion of the one or more analog-to-digital circuits and are provided in parallel to the one or more light receiving pixels in a planar view.

4 . The imaging device according to claim 3 , wherein the respective circuit sections are provided in parallel to the one or more light receiving pixels in the first direction.

5 . The imaging device according to claim 4 , wherein the plurality of pixel units is further disposed to allow the one or more light receiving pixels to be adjacent to each other in a second direction orthogonal to the first direction.

6 . The imaging device according to claim 5 , wherein in the second direction orthogonal to the first direction, the plurality of pixel units is further disposed being offset to the first direction by the one or more light receiving pixels that constitute the plurality of pixel units.

7 . The imaging device according to claim 3 , wherein the respective circuit sections are provided in parallel to the one or more light receiving pixels in a second direction orthogonal to the first direction.

8 . The imaging device according to claim 7 , wherein in the second direction orthogonal to the first direction, the plurality of pixel units is further disposed being offset to the first direction by the one or more light receiving pixels that constitute the plurality of pixel units.

9 . The imaging device according to claim 3 , wherein a formed area of the one or more analog-to-digital circuits in the plurality of pixel units is ½ or an integral multiple of a formed area of a corresponding light receiving pixel.

10 . The imaging device according to claim 2 , wherein a respective light receiving pixel further includes: a light receiving section that generates electric charges according to an amount of received light through photoelectric conversion; two first transfer transistors that transfer the electric charges generated in the light receiving section to two floating diffusion layers shared by the two pixel units; and a pixel circuit that outputs a pixel signal based on the electric charges to a corresponding analog-to-digital conversion circuit.

11 . The imaging device according to claim 10 , wherein the pixel circuit further includes a discharge transistor that resets the light receiving section at any timing.

12 . The imaging device according to claim 1 , wherein

the electric charges generated in the first light receiving pixel are transferred to the first floating diffusion layer in a first frame period and transferred to the second floating diffusion layer in a second frame period, and

the electric charges generated in the second light receiving pixel are transferred to the first floating diffusion layer in the second frame period and are transferred to the second floating diffusion layer in a third frame period.

13 . The imaging device according to claim 1 , further comprising a signal processor that performs time-delay addition processing on a plurality of the digital signals obtained for each of the light receiving pixels.

14 . An electronic apparatus comprising an imaging device, the imaging device including:

one or more light receiving pixels that generate electric charges according to an amount of received light through photoelectric conversion;

one or more analog-to-digital conversion circuits that are provided for each of the light receiving pixels and that convert an analog signal read from each of the one or more light receiving pixels into a digital signal; and

a plurality of pixel units each including the one or more light receiving pixels and the one or more analog-to-digital conversion circuits, wherein

the plurality of pixel units is disposed to allow the one or more light receiving pixels to be adjacent to each other in two pixel units that are adjacent to each other in a first direction,

the plurality of pixel units include a first pixel unit, a second pixel unit, a third pixel unit, and a fourth pixel unit that are disposed in sequence in the first direction,

the one or more light receiving pixels are disposed adjacently in the first pixel unit and the second pixel unit that are adjacent to each other and in the third pixel unit and the fourth pixel unit that are adjacent to each other, and respective circuit sections are disposed adjacently in the second pixel unit and the third pixel unit that are adjacent to each other,

the first pixel unit includes a first light receiving pixel and a first floating diffusion layer,

the second pixel unit includes a second light receiving pixel and a second floating diffusion layer,

the first floating diffusion layer and the second floating diffusion layer are disposed at a boundary between the first light receiving pixel and the second light receiving pixel disposed adjacently, and are shared by the first pixel unit and the second pixel unit,

the first pixel unit and the second pixel unit have mutually different exposure timings, and

electric charges generated in the first light receiving pixel and electric charges generated in the second light receiving pixel are analog-added in the first floating diffusion layer and the second floating diffusion layer, respectively, and thereafter, read out to a pixel circuit that outputs a pixel signal based on the electric charges to a corresponding analog-to-digital conversion circuit.

15 . The electronic apparatus according to claim 14 , wherein

the electric charges generated in the first light receiving pixel are transferred to the first floating diffusion layer in a first frame period and transferred to the second floating diffusion layer in a second frame period, and

the electric charges generated in the second light receiving pixel are transferred to the first floating diffusion layer in the second frame period and are transferred to the second floating diffusion layer in a third frame period.

16 . The electronic apparatus according to claim 14 , further comprising a signal processor that performs time-delay addition processing on a plurality of the digital signals obtained for each of the light receiving pixels.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 14, 2024
From: MACHIDA, TAKASHI
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 066779/0515 →
Priority Claims (1)
JP 2021-178914 · Nov 1, 2021 · national
Continuity (1)
Related Publication 20240430591A1 · Dec 26, 2024
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