IP Library › Granted Patent US 12,520,685
Granted Patent B2
US 12,520,685 · App. 18/700,284 · Granted Jan 6, 2026

Display substrate, preparation method therefor, and display apparatus

Inventors: Tinghua Shang (Beijing, CN); Haigang Qing (Beijing, CN); Qi Qi (Beijing, CN)
Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd.; BOE Technology Group Co., Ltd.
H10K59/131G09G3/3233H10K59/1201G09G2300/0426G09G2300/0819G09G2300/0842G09G2300/0861G09G2320/0209G09G2320/0233G09G2320/0247G09G2330/021
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Quick Facts
Patent No.
US 12,520,685
App. No.
18/700,284
Granted
Jan 6, 2026
Kind
B2
Abstract

Disclosed are a display substrate and a preparation method therefor, and a display apparatus. The display substrate includes a plurality of circuit units, at least one circuit unit includes a pixel drive circuit including at least a compensation transistor of oxide (T 2 ) and a drive transistor of polysilicon (T 3 ), a gate electrode of the compensation transistor (T 2 ) is connected to a compensation scan signal line ( 24 ), the compensation scan signal line ( 24 ) is configured to control the turn-on and turn-off of the compensation transistor (T 2 ); a first electrode of the compensation transistor (T 2 ) is provided on a side of the compensation scan signal line ( 24 ) close to the drive transistor (T 3 ) and is connected to a gate electrode of the drive transistor (T 3 ) through a first connection electrode ( 51 ).

Claims (22)

1 . A display substrate, comprising a plurality of circuit units, wherein:

at least one circuit unit comprises a pixel drive circuit, the pixel drive circuit comprises at least a compensation transistor of oxide and a drive transistor of polysilicon, a gate electrode of the compensation transistor is connected to a compensation scan signal line, the compensation scan signal line is configured to control the turn-on and turn-off of the compensation transistor; a first electrode of the compensation transistor is disposed on a side of the compensation scan signal line close to the drive transistor and connected to a gate electrode of the drive transistor through a first connection electrode, and a second electrode of the compensation transistor is disposed on a side of the compensation scan signal line away from the drive transistor and connected to a second electrode of the drive transistor through a second connection electrode; and

an orthographic projection of the first connection electrode on a plane of the display substrate and an orthographic projection of the compensation scan signal line on the plane of the display substrate are not overlapped.

2 . The display substrate according to claim 1 , wherein the compensation transistor comprises at least a compensation active layer, and the first connection electrode and the compensation active layer are both in a shape of a strip extending toward a direction of the drive transistor, and an extension length of the first connection electrode is less than an extension length of the compensation active layer.

3 . The display substrate according to claim 2 , wherein the pixel drive circuit further comprises a data writing transistor of polysilicon, a gate electrode of the data writing transistor is connected to a first scan signal line, a first electrode of the data writing transistor is connected to a data signal line, and a second electrode of the data writing transistor is connected to a first electrode of the drive transistor; the first electrode of the data writing transistor is disposed on a side of the compensation scan signal line away from the drive transistor, alternatively, the first electrode of the data writing transistor is disposed on a side of the compensation scan signal line close to the drive transistor.

4 . The display substrate according to claim 1 , wherein the second connection electrode comprises at least a first sub-electrode and a second sub-electrode, a first terminal of the first sub-electrode is connected to the second electrode of the drive transistor, a second terminal of the first sub-electrode extends toward a direction away from the drive transistor, a first terminal of the second sub-electrode is connected to the first sub-electrode, a second terminal of the second sub-electrode, after extending toward a direction of the compensation transistor, is connected to a second electrode of the compensation transistor, the first connection electrode is in a shape of a strip extending toward a direction of the drive transistor, and an extension length of the first sub-electrode is less than an extension length of the first sub-electrode.

5 . The display substrate according to claim 4 , wherein the pixel drive circuit further comprises a data writing transistor of polysilicon, a gate electrode of the data writing transistor is connected to a first scan signal line, a first electrode of the data writing transistor is connected to a data signal line, and a second electrode of the data writing transistor is connected to a first electrode of the drive transistor; the first electrode of the data writing transistor is disposed on a side of the compensation scan signal line away from the drive transistor, alternatively, the first electrode of the data writing transistor is disposed on a side of the compensation scan signal line close to the drive transistor.

6 . The display substrate according to claim 1 , wherein the at least one circuit unit further comprises a first power supply line connected to the pixel drive circuit, the first power supply line is configured to provide a first power supply signal to the pixel drive circuit, an orthographic projection of the first power supply line on the plane of the display substrate is at least partially overlapped with an orthographic projection of the first connection electrode on the plane of the display substrate.

7 . The display substrate according to claim 6 , wherein the compensation transistor comprises at least a compensation active layer, and the orthographic projection of the first power supply line on the plane of the display substrate is at least partially overlapped with an orthographic projection of the compensation active layer on the plane of the display substrate.

8 . The display substrate according to claim 6 , wherein the pixel drive circuit further comprises a data writing transistor of polysilicon, a gate electrode of the data writing transistor is connected to a first scan signal line, a first electrode of the data writing transistor is connected to a data signal line, and a second electrode of the data writing transistor is connected to a first electrode of the drive transistor; the first electrode of the data writing transistor is disposed on a side of the compensation scan signal line away from the drive transistor, alternatively, the first electrode of the data writing transistor is disposed on a side of the compensation scan signal line close to the drive transistor.

9 . The display substrate according to claim 1 , wherein the pixel drive circuit further comprises a data writing transistor of polysilicon, a gate electrode of the data writing transistor is connected to a first scan signal line, a first electrode of the data writing transistor is connected to a data signal line, and a second electrode of the data writing transistor is connected to a first electrode of the drive transistor; the first electrode of the data writing transistor is disposed on a side of the compensation scan signal line away from the drive transistor, alternatively, the first electrode of the data writing transistor is disposed on a side of the compensation scan signal line close to the drive transistor.

10 . The display substrate according to claim 9 , wherein the first scan signal line is disposed on a side of the compensation scan signal line away from the drive transistor.

11 . The display substrate according to claim 10 , wherein an orthographic projection of the first connection electrode on the plane of the display substrate and an orthographic projection of the first scan signal line on the plane of the display substrate are not overlapped.

12 . The display substrate according to claim 9 , wherein the compensation scan signal line is disposed on a side of the first scan signal line away from the drive transistor.

13 . The display substrate according to claim 12 , wherein an orthographic projection of the first connection electrode on the plane of the display substrate is at least partially overlapped with an orthographic projection of the first scan signal line on the plane of the display substrate.

14 . The display substrate according to claim 9 , wherein: the pixel drive circuit further comprises a first initialization transistor of polysilicon and a second initialization transistor of polysilicon; a gate electrode of the first initialization transistor is connected to a third scan signal line, a first electrode of the first initialization transistor is connected to a first initial signal line, and a second electrode of the first initialization transistor is connected to a second electrode of the drive transistor; a gate electrode of the second initialization transistor is connected with a second scan signal line, a first electrode of the second initialization transistor is connected with a second initial signal line, and a second electrode of the second initialization transistor is connected with an anode of a light emitting device; an orthographic projection of the second initial signal line on the plane of the display substrate is at least partially overlapped with an orthographic projection of the second scan signal line on the plane of the display substrate.

15 . The display substrate according to claim 14 , wherein the pixel drive circuit further comprises a third initialization transistor of polysilicon, a gate electrode of the third initialization transistor is connected to the second scan signal line, a first electrode of the third initialization transistor is connected to a third initial signal line, and a second electrode of the third initialization transistor is connected to the first electrode of the drive transistor; an orthographic projection of the third initial signal line on the plane of the display substrate is at least partially overlapped with an orthographic projection of the third scan signal line on the plane of the display substrate.

16 . The display substrate according to claim 15 , wherein on a plane perpendicular to the display substrate, the display substrate comprises a plurality of conductive layers sequentially disposed on a base substrate, the first initial signal line and the second initial signal line are disposed in different conductive layers, and the second initial signal line and the third initial signal line are disposed in a same conductive layer.

17 . A display apparatus, comprising the display substrate according to claim 1 .

18 . A preparation method for a display substrate comprising a plurality of circuit units, the method comprising:

forming a pixel drive circuit in at least one circuit unit, wherein the pixel drive circuit comprises at least a compensation transistor of oxide and a drive transistor of polysilicon, a gate electrode of the compensation transistor is connected to a compensation scan signal line configured to control the turn-on and turn-off of the compensation transistor; a first electrode of the compensation transistor is disposed on a side of the compensation scan signal line close to the drive transistor and connected to a gate electrode of the drive transistor through a first connection electrode, and a second electrode of the compensation transistor is disposed on a side of the compensation scan signal line away from the drive transistor and connected to a second electrode of the drive transistor through a second connection electrode,

wherein an orthographic projection of the first connection electrode on a plane of the display substrate and an orthographic projection of the compensation scan signal line on the plane of the display substrate are not overlapped.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2024
From: SHANG, TINGHUA; QING, HAIGANG; QI, QI
To: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 067355/0254 →
Continuity (1)
Related Publication 20250228086A1 · Jul 10, 2025
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