Granted Patent B2

US 12,475,399 · App. 18/718,588 · Granted Nov 18, 2025

Inventor: Emile M. Hoskinson (Vancouver, CA)

Assignee: D-WAVE SYSTEMS INC.

G06N10/40H03K17/92

Abstract

Claims (41)

1 . A method for increasing available qubit energy scale in a hybrid computing system, the hybrid computing system comprising a quantum processor and at least one digital processor, the quantum processor comprising a plurality of qubits and couplers, each qubit having a respective qubit body comprising a loop of superconducting material interrupted by at least one compound-compound Josephson junction (CCJJ), the qubit body communicatively coupled to an inductance tuner (L-tuner), the method executed by the at least one digital processor and comprising:

causing a respective L-tuner of at least a set of qubits to compensate for a coupler inductance loading;

determining a remaining respective L-tuner range for each qubit in the set of qubits;

computing a minimum homogenized inductance across all qubits in the set of qubits from the remaining respective L-tuner range;

causing a respective L-tuner of each qubit in the set of qubits to apply an inductance AL to each qubit in the set of qubits to achieve the minimum homogenized inductance;

computing a first shift in CCJJ bias Δ′ CCJJ due to the applied inductance AL; and

causing a respective CCJJ offset DAC of each qubit in the set of qubits to apply a respective second shift in CCJJ bias Δ″ CCJJ to each qubit in the set of qubits to compensate for the first shift in CCJJ bias.

2 . The method of claim 1 , further comprising applying a spin reversal transformation to increase a minimum sum of coupling strength J across all qubits in the set of qubits before causing a respective L-tuner of each qubit in the set of qubits to compensate for a coupler inductance loading.

3 . The method of claim 1 , further comprising computing a model of a shift in a qubit CCJJ bias as a function of qubit inductance at a tunneling rate.

4 . The method of claim 3 , wherein computing a first shift in CCJJ bias Δ′ CJJ due to the applied inductance ΔL includes computing a first shift in CCJJ bias Δ′ CCJJ due to the applied inductance ΔL based on the computation of the model of the shift in the qubit CCJJ bias as a function of qubit inductance at a tunneling rate.

5 . The method of claim 1 , wherein computing the minimum homogenized inductance across all qubits includes:

comparing a remaining respective L-tuner range for each qubit in the set of qubits;

selecting a smallest remaining L-tuner range; and

subtracting the smallest remaining L-tuner range from an inductance of the qubit with the smallest remaining L-tuner range to be the minimum homogenized inductance.

6 . The method of claim 1 , further comprising compensating for a crosstalk between a CCJJ offset DAC and the respective qubit body for each qubit in the set of qubits by measuring an offset from each respective CCJJ offset DAC and causing a respective qubit flux bias to compensate for the measured offset.

7 . The method of claim 1 , wherein causing a respective L-tuner of at least a set of qubits to compensate for a coupler inductance loading includes causing a respective L-tuner of each qubit in the set of qubits to compensate for a coupler inductance loading wherein each qubit in the set of qubits is utilized for an Ising spin problem to be computed by the quantum processor.

8 . The method of claim 1 , wherein causing a respective L-tuner of each qubit in the set of qubits to apply an inductance ΔL to each qubit in the set of qubits includes causing a respective L-tuner of each qubit in the set of qubits to apply an inductance ΔL=−M afm [a+min(Σ j J ij )], wherein M afm is a maximum antiferromagnetic coupling between two qubits, a is a constant, and Σ j J ij is a sum of coupling strengths J ij between qubit i and coupled qubits j.

9 . The method of claim 8 wherein causing a respective L-tuner of each qubit in the set of qubits to apply an inductance ΔL to each qubit in the set of qubits includes causing a respective L-tuner of each qubit in the set of qubits to apply an inductance ΔL=−M afm [a+min(Σ j J ij )], where a depends on a minimum allowed sum of coupling strength J.

10 . The method of claim 1 , wherein causing a respective CCJJ offset DAC of each qubit in the set of qubits to apply a respective second shift in CCJJ bias Δ″ CCJJ to each qubit in the set of qubits includes causing a respective CCJJ offset DAC of each qubit in the set of qubits to apply a respective second shift in CCJJ bias Δ″ CCJJ =−Δ′ CCJJ *(M ccji −mean(M ccjj )), wherein M ccjj is a mutual inductance between a respective CCJJ analog bias line and a respective lobe of the CCJJ and mean(M ccjj ) is a calculated mean value of M ccjj across all qubits.

11 . A hybrid computing system comprising:

a quantum processor, the quantum processor comprising a plurality of qubits and couplers, each qubit in the plurality of qubits comprising a respective qubit body, the qubit body comprising a loop of superconducting material interrupted by at least one compound-compound Josephson junction (CCJJ), the qubit body communicatively coupled to an inductance tuner (L-tuner), the CCJJ communicatively coupled to a respective CCJJ analog bias line and a respective CCJJ offset DAC;

at least one digital processor; and

at least one non-transitory computer-readable storage medium communicatively coupled to the at least one digital processor and that stores processor-executable instructions which, when executed, causes the at least one digital processor to:

cause a respective L-tuner of at least a set of qubits to compensate for a coupler inductance loading;

determine a remaining respective L-tuner range for each qubit in the set of qubits;

compute a minimum homogenized inductance across all qubits in the set of qubits from the remaining respective L-tuner range;

cause a respective L-tuner of each qubit in the set of qubits to apply an inductance ΔL to each qubit in the set of qubits to achieve the minimum homogenized inductance;

compute a first shift in CCJJ bias Δ′ CCJJ due to the applied inductance ΔL; and

cause a respective CCJJ offset DAC of each qubit in the set of qubits to apply a respective second shift in CCJJ bias Δ″ CCJJ to each qubit in the set of qubits.

12 . The hybrid computing system of claim 11 , wherein each qubit body is galvanically coupled to a respective L-tuner.

13 . The hybrid computing system of claim 11 , wherein the processor-executable instructions, when executed, further causes the at least one digital processor to apply a spin reversal transformation to increase a minimum sum of coupling strength J across all qubits before causing a respective L-tuner of each qubits in the set of qubits to compensate for a coupler inductance loading.

14 . The hybrid computing system of claim 11 , wherein the processor-executable instructions, when executed, causes the at least one digital processor to compute model of a shift in a qubit CCJJ bias as a function of qubit inductance at a tunneling rate.

15 . The hybrid computing system of claim 14 , wherein the processor-executable instructions, when executed, causes the at least one digital processor to compute a first shift in CCJJ bias Δ CCJJ due to the applied inductance ΔL based on the computation of the model of the shift in the qubit CCJJ bias as a function of qubit inductance at a tunneling rate.

16 . The hybrid computing system of claim 11 , wherein the processor-executable instructions, when executed, causes the at least one digital processor to compute the minimum homogenized inductance across all qubits in the set of qubits by:

comparing a remaining respective L-tuner range for each qubit in the set of qubits;

selecting a smallest remaining L-tuner range; and

subtracting the smallest remaining L-tuner range from an inductance of the qubit with the smallest remaining L-tuner range to be the minimum homogenized inductance.

17 . The hybrid computing system of claim 11 , wherein the processor-executable instructions, when executed, further causes the at least one digital processor to compensate for a crosstalk between a CCJJ offset DAC and the respective qubit body for each qubit in the set of qubits by measuring an offset from each respective CCJJ offset DAC and causing a respective qubit flux bias to compensate for the measured offset.

18 . The hybrid computing system of claim 11 , wherein the processor-executable instructions, when executed, causes the at least one digital processor to cause a respective L-tuner of each qubit in the set of qubits to apply an inductance ΔL to each qubit in the set of qubits, wherein ΔL=−M afm [a+min(Σ j J ij )], M afm is a maximum antiferromagnetic coupling between two qubits, a is a constant, and Σ j J ij is a sum of coupling strengths J ij between qubit i and coupled qubits j in the quantum processor.

19 . The hybrid computing system of claim 18 , wherein the processor-executable instructions, when executed, causes the at least one digital processor to cause a respective L-tuner of each qubit in the set of qubits to apply an inductance ΔL to each qubit in the set of qubits, wherein ΔL=−M afm [a+min(Σ j J ij )], where a depends on a minimum allowed sum of coupling strength J.

20 . The hybrid computing system of claim 11 , wherein the second shift in CCJJ bias Δ″ CCJJ is Δ″ CCJJ =−Δ′ CCJJ *(M ccjj −mean(M ccjj )), wherein M ccjj is a mutual inductance between a respective CCJJ analog bias line and a respective lobe of the CCJJ and mean(M ccjj ) is a calculated mean value of M ccjj across all qubits.

Assignments (2)

Continuity (2)

References Cited (276)