IP Library › Granted Patent US 12,422,983
Granted Patent B2
US 12,422,983 · App. 18/735,491 · Granted Sep 23, 2025

Memory management method based on compressed memory and apparatus using the same

Inventors: Youngsam Shin (Suwon-si, KR); Deok Jae Oh (Suwon-si, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
G06F3/0608G06F3/0659G06F3/0673
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Quick Facts
Patent No.
US 12,422,983
App. No.
18/735,491
Granted
Sep 23, 2025
Kind
B2
Abstract

A memory management method based on a compressed memory and an apparatus using the same are provided. A memory device includes a memory and a near memory processing unit. The memory includes a normal memory area for storing uncompressed data and a compressed memory area for storing compressed data. The near memory processing unit is configured to receive a first command to frontswap-store a huge page, which is stored in the normal memory area, in the compressed memory area; identify addresses of sub-pages of the huge page based on an address of the huge page; compress the sub-pages using the addresses of the sub-pages to generate compressed sub-pages; and store the compressed sub-pages in the compressed memory area. A size of the huge page is larger than a regular page.

Claims (61)

1. A memory device comprising:

a memory comprising a normal memory area for storing uncompressed data and a compressed memory area for storing compressed data; and

a near memory processing unit configured to:

receive a first command to frontswap-store a huge page, which is stored in the normal memory area, in the compressed memory area, wherein a size of the huge page is larger than a regular page,

identify addresses of sub-pages of the huge page based on an address of the huge page,

compress the sub-pages using the addresses of the sub-pages to generate compressed sub-pages, and

store the compressed sub-pages in the compressed memory area.

2. The memory device of claim 1 , wherein the near memory processing unit is configured to identify the addresses of the sub-pages based on whether the addresses of the sub-pages are consecutive.

3. The memory device of claim 1 , wherein the near memory processing unit is configured to, when the sub-pages are stored in a consecutive address space, determine an address of a following sub-page of the sub-pages by adding a sub-page size to an address of a current sub-page of the sub-pages.

4. The memory device of claim 1 , wherein the near memory processing unit is configured to:

when the sub-pages are stored in a non-consecutive address space, obtain a page frame number of a following sub-page of the sub-pages by performing a page table walk, and

determine an address of the following sub-page by adding a page offset of the following sub-page to the page frame number of the following sub-page.

5. The memory device of claim 1 , wherein the near memory processing unit is configured to:

receive a second command to request a target sub-page of the huge page after the huge page is frontswap-stored in the compressed memory area,

determine a target frame number based on a difference between the address of the huge page and an address of the target sub-page,

determine an address of a compressed target sub-page in the compressed memory area based on the target frame number,

decompress the compressed target sub-page using the address of the compressed target sub-page to generate a decompressed target sub-page, and

store the decompressed target sub-page in the normal memory area.

6. The memory device of claim 5 , wherein decompression of the compressed target sub-page is performed prior to decompression of remaining compressed sub-pages of the huge page.

7. The memory device of claim 1 , wherein the memory comprises a first memory channel and a second memory channel.

8. The memory device of claim 7 , wherein the sub-pages of the huge page are distributed across the first memory channel and the second memory channel, and

the near memory processing unit is configured to compress the sub-pages by parallel processing the sub-pages distributed across the first memory channel and the second memory channel.

9. The memory device of claim 7 , wherein the near memory processing unit comprises a first processing unit disposed to communicate with the first memory channel and a second processing unit disposed to communicate with the second memory channel.

10. The memory device of claim 9 , wherein, when a sub-page of the sub-pages is comprised in the first memory channel, the sub-page is compressed by the first processing unit, and

when a sub-page of the sub-pages is comprised in the second memory channel, the sub-page is compressed by the second processing unit.

11. The memory device of claim 9 , wherein the first processing unit is configured to compress a portion of the sub-pages stored in the first memory channel,

the second processing unit is configured to compress the other portion of the sub-pages stored in the second memory channel, and

a compression operation of the portion of the sub-pages by the first processing unit is performed in parallel with a compression operation of the other portion of the sub-pages by the second processing unit.

12. A memory device comprising:

a memory comprising a first memory channel comprising a first normal memory area and a first compressed memory area and a second memory channel comprising a second normal memory area and a second compressed memory area;

a first processing unit disposed to communicate with the first memory channel; and

a second processing unit disposed to communicate with the second memory channel,

wherein sub-pages of a huge page having a size larger than a regular page are distributed across the first normal memory area and the second normal memory area, and

in response to a first command to frontswap-store the huge page in the compressed memory area, the first processing unit and the second processing unit are configured to compress the sub-pages by parallel processing the sub-pages.

13. The memory device of claim 12 , wherein, based on addresses of the sub-pages, when a sub-page of the sub-pages is comprised in the first memory channel, the sub-page is compressed by the first processing unit, and

when a sub-page of the sub-pages is comprised in the second memory channel, the sub-page is compressed by the second processing unit.

14. The memory device of claim 12 , wherein the first processing unit is configured to compress a portion of the sub-pages stored in the first memory channel,

the second processing unit is configured to compress the other portion of the sub-pages stored in the second memory channel, and

a compression operation of the portion of the sub-pages by the first processing unit is performed in parallel with a compression operation of the other portion of the sub-pages by the second processing unit.

15. A memory management method of a memory device, the memory management method comprising:

receiving a first command to frontswap-store a huge page, which is stored in a normal memory area of a memory, in a compressed memory area of the memory, wherein a size of the huge page is larger than a regular page;

identifying addresses of sub-pages of the huge page based on an address of the huge page;

compressing the sub-pages using the addresses of the sub-pages to generate compressed sub-pages; and

storing the compressed sub-pages in the compressed memory area.

16. The memory management method of claim 15 , wherein the identifying of the addresses of the sub-pages comprises, when the sub-pages are stored in a consecutive address space, determining an address of a following sub-page of the sub-pages by adding a sub-page size to an address of a current sub-page of the sub-pages.

17. The memory management method of claim 15 , wherein the identifying of the addresses of the sub-pages comprises:

when the sub-pages are stored in a non-consecutive address space, obtaining a page frame number of a following sub-page of the sub-pages by performing a page table walk; and

determining an address of the following sub-page by adding a page offset of the following sub-page to the page frame number of the following sub-page.

18. The memory management method of claim 15 , further comprising:

receiving a second command to request a target sub-page of the huge page after the huge page is frontswap-stored in the compressed memory area;

determining a target frame number based on a difference between the address of the huge page and an address of the target sub-page;

determining an address of a compressed target sub-page in the compressed memory area based on the target frame number;

decompressing the compressed target sub-page using the address of the compressed target sub-page to generate a decompressed target sub-page; and

storing the decompressed target sub-page in the normal memory area.

19. The memory management method of claim 15 , wherein the memory comprises a first memory channel and a second memory channel,

the sub-pages of the huge page is distributed across the first memory channel and the second memory channel, and

the compressing of the sub-pages comprises compressing the sub-pages by parallel processing the sub-pages distributed across the first memory channel and the second memory channel.

20. The memory management method of claim 19 , further comprising:

identifying memory channels comprising the sub-pages based on the addresses of the sub-pages;

when a sub-page of the sub-pages is comprised in the first memory channel, compressing the sub-page using a first processing unit disposed to communicate with the first memory channel; and

when the sub-page is comprised in the second memory channel, compressing the sub-page using a second processing unit disposed to communicate with the second memory channel.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 6, 2024
From: SHIN, YOUNGSAM; OH, DEOK JAE
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 067644/0294 →
Priority Claims (1)
KR 10-2023-0089788 · Jul 11, 2023 · national
Continuity (1)
Related Publication 20250021227A1 · Jan 16, 2025
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