IP Library › Granted Patent US 12,271,635
Granted Patent B2
US 12,271,635 · App. 18/737,592 · Granted Apr 8, 2025

Systems and methods for implementing and using a cross-process queue within a single computer

Inventors: Lawrence Edmund Lewis (Durham, NC); Mohammadreza Nazari (Wayne, PA); Amirhassan Fallah Dizche (Woburn, MA)
Assignee: SAS INSTITUTE INC.
G06F3/0659G06F3/0619G06F3/0673
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Quick Facts
Patent No.
US 12,271,635
App. No.
18/737,592
Granted
Apr 8, 2025
Kind
B2
Abstract

A system, method, and computer-program product includes implementing a cross-process queue within a single computer that is configured to transfer a data block between an operating system process executing a write operation and an operating system process executing a read operation, initializing in-memory cell indices within the cross-process queue that include a write operation index tracking index values of one or more cells within the cross-process queue that are available to write and a read operation index tracking index values of one or more cells within the cross-process queue that are available to read, and implementing a cell synchronization data structure tracking states of a plurality of cells of the index of cells of the cross-process queue.

Claims (64)

1. A computer-program product embodied in a non-transitory machine-readable storage medium storing computer instructions that, when executed by one or more processors, perform operations comprising: implementing a cross-process queue within a shared memory of a single computer that is configured to transfer a data block between a write operating process executing a write operation and a read operating system process executing a read operation, wherein the cross-process queue includes an index of cells; initializing in-memory cell indices within the shared memory that includes: (1) a write operation index tracking index values of one or more cells within the cross-process queue that are available to write, and (2) a read operation index tracking index values of one or more cells within the cross-process queue that are available to read, wherein the in-memory cell indices govern write operations to and read operations from a plurality of cells of the index of cells as directed by the write operating system process executing the write operation and the read operating system process executing the read operation based on the index values tracked by the write operation index and the index values tracked by the read operation index; and implementing a cell synchronization data structure tracking states of the plurality of cells of the index of cells of the cross-process queue, wherein the cell synchronization data structure tracks a first count of cells of the plurality of cells of the index of cells that are available to write and tracks a second count of cells of the plurality of cells of the index of cells that are available to read, wherein the cell synchronization data structure regulates a utilization of the cross-process queue for the write operating system process executing the write operation and the read operating system process executing the read operation based on the first count of cells of the index of cells that are available to write and the second count of cells of the index of cells that are available to read.

2. The computer-program product according to claim 1 , wherein: when the first count of cells of the index of cells that are available to write is greater than zero, the cell synchronization data structure causes a given write operating system process requesting to execute a given write operation to access the cross-process queue, and when the first count of cells of the index of cells that are available to write is zero, the cell synchronization data structure causes the given write operating system process requesting to execute the given write operation to pause and not access the cross-process queue.

3. The computer-program product according to claim 1 , wherein: when the second count of cells of the index of cells that are available to read is greater than zero, the cell synchronization data structure causes a given read operating system process requesting to execute a given read operation to access the cross-process queue, and when the second count of cells of the index of cells that are available to read is zero, the cell synchronization data structure causes the given read operating system process requesting to execute the given read operation to pause and not access the cross-process queue.

4. The computer-program product according to claim 1 , wherein: the cell synchronization data structure further regulates the utilization of the cross-process queue by a plurality of write operating system processes requesting to execute write operations and a plurality of read operating system processes requesting to execute read operations based on the first count of cells of the index of cells that are available to write and the second count of cells of the index of cells that are available to read, and the in-memory cell indices govern write operations to and read operations from the plurality of cells of the index of cells as directed by the plurality of write operating system processes requesting to execute write operations and the plurality of read operating system processes requesting to execute read operations based on the write index values tracked by the write operations index and the read index values tracked by the read operation index.

5. The computer-program product according to claim 4 , wherein:

when the write operation index of the in-memory cell indices tracks at least one index value of a cell of the index of cells that is available to write, a given index value of a cell of the index of cells is assigned to a given write operating system process of the plurality of operating system processes requesting to execute write operations.

6. The computer-program product according to claim 4 , wherein:

when the read operation index of the in-memory cell indices tracks at least one index value of a cell of the index of cells that is available to read, a given index value of a cell of the index of cells is assigned to a given read operating system process of the plurality of operating system processes requesting to execute read operations.

7. The computer-program product according to claim 1 , further comprising:

executing, by the read operating system process executing the read operation and the write operating system process executing the write operation, atomic updates causing a change to the write index values tracked by the write operation index and the read index values tracked by the read operation index.

8. The computer-program product according to claim 1 , further comprising:

implementing a plurality of shared memory channels defining a channel index of shared memory channels within the single computer, the plurality of shared memory channels each having an associated cross-process queue for transferring data between a plurality of write operating system processes executing write operations and a plurality of read operating system processes executing read operations.

9. The computer-program product according to claim 8 , further comprising:

implementing in-memory channel indices of the plurality of shared memory channels that include:

a first free channel index tracking a given channel index value of a given shared memory channel at a head of a queue of shared memory channels that are available to write;

a first used channel index tracking another given channel index value of another given shared memory channel at a head of a queue of shared memory channels that are available to read;

a last used channel index tracking a further given channel index value of a further given shared memory channel at a tail of the queue of shared memory channels that are available to read,

wherein the in-memory channel indices regulate a utilization of the channel index of shared memory channels by the plurality of operating system processes executing write operations and the plurality of read operating system processes executing read operations based on given index values of the first free channel index and another given index values of the first used channel index.

10. The computer-program product according to claim 8 , further comprising:

implementing a channel synchronization data structure tracking states of the plurality of shared memory channels of the channel index of shared memory channels, wherein the channel synchronization data structure:

tracks a count of channels of the channel index of shared memory channels not assigned to any operating system processes, and

tracks a count of channels of the channel index of shared memory channels assigned to any given write operating system process executing write operations and that are not assigned to any given read operating system process executing read operations;

wherein the channel synchronization data structure controls an acquisition of one or more of the plurality of shared memory channels by the plurality of operating system processes executing write operations and the plurality of operating system processes executing read operations based on the count of channels of the channel index of shared memory channels not assigned to any operating system processes and the count of channels of the channel index of shared memory channels assigned to any given write operating system process executing write operations and that are not assigned to any given read operating system process executing read operations.

11. The computer-program product according to claim 10 , wherein:

when the count of channels of the channel index of shared memory channels not assigned to any operating system processes is greater than zero, the channel synchronization data structure allows an acquisition of a given shared memory channel of the channel index of shared memory channels by a subject operating system process requesting to execute a write operation to the channel index of shared memory channels, and

when the count of channels of the channel index of shared memory channels not assigned to any operating system processes is zero, the channel synchronization data structure disallows the acquisition of the given shared memory channel of the channel index of shared memory channels by the subject operating system process requesting to execute the write operation to the channel index of shared memory channels.

12. The computer-program product according to claim 11 , wherein:

the acquisition of the given shared memory channel by the subject operating system process requesting to execute the write operation, removes a given index value of the given shared memory channel from an array of index values of shared memory channels that are available to write and inserts the given index value of the given shared memory channel to an array of index values of shared memory channels that are available to read at a completion of the write operation.

13. The computer-program product according to claim 11 , wherein:

the acquisition of the given shared memory channel by the subject operating system process requesting to execute the read operation, removes a given index value of the given shared memory channel from the array of index values of shared memory channels that are available to read and inserts the given index value of the given shared memory channel to the array of index values of shared memory channels that are available to write at a completion of the read operation.

14. A computer-implemented method comprising: implementing a cross-process queue within a shared memory of a single computer that is configured to transfer a data block between a write operating process executing a write operation and a read operating system process executing a read operation, wherein the cross-process queue includes an index of cells; initializing in-memory cell indices within the shared memory that includes: (1) a write operation index tracking write index values of one or more cells within the cross-process queue that are available to write, and (2) a read operation index tracking read index values of one or more cells within the cross-process queue that are available to read, wherein the in-memory cell indices govern write operations to and read operations from a plurality of cells of the index of cells as directed by the write operating system process executing the write operation and the read operating system process executing the read operation based on the index values tracked by the write operation index and the index values tracked by the read operation index; and implementing a cell synchronization data structure tracking states of the plurality of cells of the index of cells of the cross-process queue, wherein the cell synchronization data structure tracks a first count of cells of the plurality of cells of the index of cells that are available to write and tracks a second count of cells of the plurality of cells of the index of cells that are available to read, wherein the cell synchronization data structure regulates a utilization of the cross-process queue for the write operating system process executing the write operation and the read operating system process executing the read operation based on the first count of cells of the index of cells that are available to write and the second count of cells of the index of cells that are available to read.

15. The computer-implemented method according to claim 14 , wherein: when the first count of cells of the index of cells that are available to write is greater than zero, the cell synchronization data structure causes a given write operating system process requesting to execute a given write operation to access the cross-process queue, and when the first count of cells of the index of cells that are available to write is zero, the cell synchronization data structure causes the given write operating system process requesting to execute the given write operation to pause and not access the cross-process queue.

16. The computer-implemented method according to claim 14 , wherein: when the second count of cells of the index of cells that are available to read is greater than zero, the cell synchronization data structure causes a given read operating system process requesting to execute a given read operation to access the cross-process queue, and when the second count of cells of the index of cells that are available to read is zero, the cell synchronization data structure causes the given read operating system process requesting to execute the given read operation to pause and not access the cross-process queue.

17. The computer-implemented method according to claim 14 , wherein: the cell synchronization data structure further regulates the utilization of the cross-process queue by a plurality of write operating system processes requesting to execute write operations and a plurality of read operating system processes requesting to execute read operations based on the first count of cells of the index of cells that are available to write and the second count of cells of the index of cells that are available to read, and the in-memory cell indices govern write operations to and read operations from the plurality of cells of the index of cells as directed by the plurality of write operating system processes requesting to execute write operations and the plurality of read operating system processes requesting to execute read operations based on the write index values tracked by the write operations index and the read index values tracked by the read operation index.

18. The computer-implemented method according to claim 17 , wherein:

when the write operation index of the in-memory cell indices tracks at least one index value of a cell of the index of cells that is available to write, a given index value of a cell of the index of cells is assigned to a given read operating system process of the plurality of write operating system processes requesting to execute write operations.

19. The computer-implemented method according to claim 17 , wherein:

when the read operation index of the in-memory cell indices tracks at least one index value of a cell of the index of cells that is available to read, a given index value of a cell of the index of cells is assigned to a given read operating system process of the plurality of read operating system processes requesting to execute read operations.

20. The computer-implemented method according to claim 14 , further comprising:

executing, by the read operating system process executing the read operation and the write operating system process executing the write operation, atomic updates causing a change to the index values tracked by the write operation index and the index values tracked by the read operation index.

21. The computer-implemented method according to claim 14 , further comprising:

implementing a plurality of shared memory channels defining an index of shared memory channels within the single computer, the plurality of shared memory channels each having an associated cross-process queue for transferring data between a plurality of write operating system processes executing write operations and a plurality of read operating system processes executing read operations.

22. The computer-implemented method according to claim 21 , further comprising:

implementing in-memory channel indices of the plurality of shared memory channels that include:

a first free channel index tracking a given index value of a given shared memory channel at a head of a queue of shared memory channels that are available to write;

a first used channel index tracking another given index value of another given shared memory channel at a head of a queue of shared memory channels that are available to read;

a last used channel index tracking a further given index value of a further given shared memory channel at a tail of the queue of shared memory channels that are available to read,

wherein the in-memory channel indices regulate a utilization of the index of shared memory channels by the plurality of write operating system processes executing write operations and the plurality of read operating system processes executing read operations based on index values of the first free channel index and index values of the first used channel index.

23. The computer-implemented method according to claim 21 , further comprising:

implementing a channel synchronization data structure tracking states of the plurality of shared memory channels of the channel index of shared memory channels, wherein the channel synchronization data structure:

tracks a count of channels of the channel index of shared memory channels not assigned to any operating system processes, and

tracks a count of channels of the channel index of shared memory channels assigned to any given write operating system process executing write operations and that are not assigned to any given read operating system process executing read operations;

wherein the channel synchronization data structure controls an acquisition of one or more of the plurality of shared memory channels by the plurality of write operating system processes executing write operations and the plurality of read operating system processes executing read operations based on the count of channels of the channel index of shared memory channels not assigned to the any operating system processes and the count of channels of the channel index of shared memory channels assigned to any given write operating system process executing write operations and that are not assigned to any given read operating system process executing read operations.

24. The computer-implemented method according to claim 23 , wherein:

when the count of channels of the channel index of shared memory channels not assigned to the any operating system processes is greater than zero, the channel synchronization data structure allows an acquisition of a given shared memory channel of the index of shared memory channels by a subject operating system process requesting to execute a write operation to the index of shared memory channels, and

when the count of channels of the index of shared memory channels not assigned to the any operating system processes is zero, the channel synchronization data structure disallows the acquisition of the given shared memory channel of the channel index of shared memory channels by the subject write operating system process requesting to execute the write operation to the channel index of shared memory channels.

25. The computer-implemented method according to claim 24 , wherein:

the acquisition of the given shared memory channel by the subject write operating system process requesting to execute the write operation, removes a channel index value of the given shared memory channel from an array of index values of shared memory channels that are available to write and inserts the channel index value of the given shared memory channel to an array of index values of shared memory channels that are available to read at a completion of the write operation.

26. The computer-implemented method according to claim 24 , wherein:

the acquisition of the given shared memory channel by the subject read operating system process requesting to execute the read operation, removes an index value of the given shared memory channel from the array of index values of shared memory channels that are available to read and inserts the index value of the given shared memory channel to the array of index values of shared memory channels that are available to write at a completion of the read operation.

27. A computer-implemented system comprising: one or more processors; a memory; a computer-readable medium operably coupled to the one or more processors, the computer-readable medium having computer-readable instructions stored thereon that, when executed by the one or more processors, cause a computing device to perform operations comprising: implementing a cross-process queue within a shared memory of a single computer that is configured to transfer a data block between a write operating process executing a write operation and a read operating system process executing a read operation, wherein the cross-process queue includes an index of cells; initializing in-memory cell indices within the shared memory that includes: (1) a write operation index tracking index values of one or more cells within the cross-process queue that are available to write, and (2) a read operation index tracking index values of one or more cells within the cross-process queue that are available to read, wherein the in-memory cell indices govern write operations to and read operations from a plurality of cells of the index of cells as directed by the write operating system process executing the write operation and the read operating system process executing the read operation based on the index values tracked by the write operation index and the index values tracked by the read operation index; and implementing a cell synchronization data structure tracking states of the plurality of cells of the index of cells of the cross-process queue, wherein the cell synchronization data structure tracks a first count of cells of the plurality of cells of the index of cells that are available to write and tracks a second count of cells of the plurality of cells of the index of cells that are available to read, wherein the cell synchronization data structure regulates a utilization of the cross-process queue for the write operating system process executing the write operation and the read operating system process executing the read operation based on the first count of cells of the index of cells that are available to write and the second count of cells of the index of cells that are available to read.

28. The computer-implemented system according to claim 27 , wherein: when the first count of cells of the index of cells that are available to write is greater than zero, the cell synchronization data structure causes a given write operating system process requesting to execute a given write operation to access the cross-process queue, and when the first count of cells of the index of cells that are available to write is zero, the cell synchronization data structure causes the given write operating system process requesting to execute the given write operation to pause and not access the cross-process queue.

29. The computer-implemented system according to claim 27 , wherein: when the second count of cells of the index of cells that are available to read is greater than zero, the cell synchronization data structure causes a given read operating system process requesting to execute a given read operation to access the cross-process queue, and when the second count of cells of the index of cells that are available to read is zero, the cell synchronization data structure causes the given read operating system process requesting to execute the given read operation to pause and not access the cross-process queue.

30. The computer-implemented system according to claim 27 , wherein: the cell synchronization data structure further regulates the utilization of the cross-process queue by a plurality of write operating system processes requesting to execute write operations and a plurality of read operating system processes requesting to execute read operations based on the first count of cells of the index of cells that are available to write and the second count of cells of the index of cells that are available to read, and the in-memory cell indices govern write operations to and read operations from the plurality of cells of the index of cells as directed by the plurality of write operating system processes requesting to execute write operations and the plurality of read operating system processes requesting to execute read operations based on the write index values tracked by the write operations index and the read index values tracked by the read operation index.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2024
From: LEWIS, LAWRENCE EDMUND; NAZARI, MOHAMMADREZA; DIZCHE, AMIRHASSAN FALLAH
To: SAS INSTITUTE INC.
Reel/Frame 067673/0863 →
Continuity (2)
Provisional Application 63534326 · Aug 23, 2023
Related Publication 20250068357A1 · Feb 27, 2025
References Cited (55)
US 6182158B1 · Kouglouris et al. · 2001 [cited by applicant]
US 6631478B1 · Wang · 2003 [cited by examiner]
US 6757904B1 · Woodruff et al. · 2004 [cited by applicant]
US 7380073B2 · Shorb · 2008 [cited by applicant]
US 7594091B2 · Shorb · 2009 [cited by applicant]
US 7627710B1 · Todd et al. · 2009 [cited by applicant]
US 8429675B1 · Radhakrishnan et al. · 2013 [cited by applicant]
US 8572617B2 · Shorb · 2013 [cited by applicant]
US 9213586B2 · Shorb · 2015 [cited by applicant]
US 10459849B1 · Shorb et al. · 2019 [cited by applicant]
US 10803023B2 · Ghazaleh · 2020 [cited by applicant]
US 10803024B2 · Ghazaleh · 2020 [cited by applicant]
US 11042549B2 · Ghazaleh · 2021 [cited by applicant]
US 11099899B2 · Shorb · 2021 [cited by applicant]
US 20020152280A1 · Winkeler et al. · 2002 [cited by applicant]
US 20040015979A1 · Shen et al. · 2004 [cited by applicant]
US 20080147213A1 · Omiya · 2008 [cited by examiner]
US 20090282392A1 · Russell · 2009 [cited by applicant]
US 20120005691A1 · Wong et al. · 2012 [cited by applicant]
US 20130246714A1 · Lv et al. · 2013 [cited by applicant]
US 20140006718A1 · Ramani-Augustin et al. · 2014 [cited by applicant]
US 20140215181A1 · Svendsen · 2014 [cited by examiner]
US 20150046661A1 · Gathala et al. · 2015 [cited by applicant]
US 20160092357A1 · Rehana · 2016 [cited by examiner]
US 20170017412A1 · Luan et al. · 2017 [cited by applicant]
US 20190012269A1 · Bubb et al. · 2019 [cited by applicant]
US 20190196745A1 · Persson · 2019 [cited by examiner]
US 20190370288A1 · Bequet et al. · 2019 [cited by applicant]
US 20220342573A1 · Cai et al. · 2022 [cited by applicant]
CN 100573497 · 2009 [cited by applicant]
CN 101477511B · 2010 [cited by applicant]
CN 101847105A · 2010 [cited by applicant]
CN 110347517A · 2019 [cited by applicant]
CN 115437719A · 2022 [cited by applicant]
WO 9912095A1 · 1999 [cited by applicant]
Mod Python, “4.1 Multiple Interpreters,” 2024 pp. 1-1. [cited by applicant]
Github, “Multicorn is a Multi-Interpreter Server for Python,” 2024, pp. 1-3. [cited by applicant]
IN202421040823A, “Application not yet published”, pp. 1-15. [cited by applicant]
Python Enhancement Proposals, “PEP 554—Multiple Interpreters in the Stdlib,” Sep. 5, 2017 , pp. 1-40. [cited by applicant]
Python Enhancement Proposals, “PEP 734—Multiple Interpreters in the Stdlib,” Nov. 6, 2023 , pp. 1-23. [cited by applicant]
Mouse Vs Python, “Python 3.13 Allows Disabling of the GIL + Subinterpreters.,” Mar. 14, 2024, pp. 1-6. [cited by applicant]
Stinner et al., “The 2021 Python Language Summit: Progress on Running Multiple Python interpreters in Parallel in the Same Process,” Python Software Foundation, May 16, 2021, pp. 1-3. [cited by applicant]
Github, “Running Python Parallel Applications with Sub Interpreters,” Nov. 17, 2023, pp. 1-19. [cited by applicant]
Microsoft, “Select and Install Python Interpreters—Visual Studio (Windows),” 2022, pp. 1-4. [cited by applicant]
Jake Edge, “Subinterpreters for Python,” lwn.net, May 13, 2020, pp. 1-10. [cited by applicant]
Nathan Ojaokomo, “What is a Python Interpreter,” Jan. 4, 2023, pp. 1-13. [cited by applicant]
Boost Software, “Class Template Quene,” 2008, pp. 1-6. [cited by applicant]
TU/e Eindhoven University of Technology, “Co-operating Sequential Processes,” Jan. 1, 1968, pp. 1-88. [cited by applicant]
E.W. Dijkstra Archive, “Cooperating Sequential Processes,” Aug. 11, 2010, pp. 1-31. [cited by applicant]
Readme.Md, “A Fast Multi-Producer, Multi-Consumer Lock-Free Concurrent Quene for C++11,”Jun. 10, 2023 , pp. 1-13. [cited by applicant]
Readme.Md, “A Bounded Single-Producer Single-Consumer Wait-Free and Lock-Free Quene Written in C++11,” Jun. 22, 2021, pp. 1-7. [cited by applicant]
Intel, “Intel oneAPI Threading Building Blocks Documentation.,” Sep. 30, 2022, pp. 1-3. [cited by applicant]
Baeldung, “Producer-Consumer Problem with Example in Java,” Aug. 29, 2023, pp. 1-19. [cited by applicant]
Pypi, “Ipcquene 0.9.7,” Sep. 11, 2021, pp. 1-4. [cited by applicant]
Ipcquene, “Welcome to Ipcquene's Documentation,” 2017, pp. 1-5. [cited by applicant]