IP Library Granted Patent US 12,413,772
Granted Patent B2
US 12,413,772 · App. 18/738,814 · Granted Sep 9, 2025

Image processing apparatus and image processing method

Inventor: Ohji Nakagami (Tokyo, JP)
Assignee: SONY CORPORATION
H04N19/52H04N19/105H04N19/134H04N19/176H04N19/58H04N19/593H04N19/70
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Quick Facts
Patent No.
US 12,413,772
App. No.
18/738,814
Granted
Sep 9, 2025
Kind
B2
Abstract

The present disclosure relates to an image processing apparatus and an image processing method that are capable of improving coding efficiency at the time when a prediction using a correlation within a screen is performed. A predicted vector generation section sets, at a time of encoding of a current motion vector of a current block for a prediction using a correlation within a screen, a candidate block to not available and generates a predicted vector of the current motion vector by using a reference motion vector, the reference motion vector being referred to when the predicted vector of the current motion vector is generated. A difference vector generation section generates a difference vector between the current motion vector and the predicted vector generated by the predicted vector generation section. The present disclosure can be applied to, for example, an encoding apparatus.

Claims (34)

1. An image processing apparatus, comprising:

circuitry configured to

exclude, in a case where a type of a reference picture of a current block and a type of a reference picture of a candidate block corresponding to a candidate of a reference motion vector are different from each other and neither the type of the reference picture of the current block nor the type of the reference picture of the candidate block is Short-Term Reference Picture (STRP), a motion vector of the candidate block from candidates of the reference motion vector,

generate, in a case where a type of the reference picture of the current block and the type of the reference picture of the candidate block are each STRP, a predicted vector of a current motion vector by performing scaling on the reference motion vector on a basis of a difference in picture order count (POC) between the reference picture of the current block and the reference picture of the candidate block,

generate, in a case where the type of the reference picture of the current block and the type of the reference picture of the candidate block are each Intra Block Copy (Intra BC), the predicted vector of the current motion vector by setting the reference motion vector to the predicted vector without scaling,

generate, in a case where the type of the reference picture of the current block and the type of the reference picture of the candidate block are each Long-Term Reference Picture (LTRP), the predicted vector of the current motion vector by setting the reference motion vector to the predicted vector without scaling,

register a picture of the current block in a predetermined position of a list of candidates of the reference picture of the current block, and

add a difference vector between the current motion vector and the predicted vector to the predicted vector and generate the current motion vector.

2. The image processing apparatus according to claim 1 , wherein

the circuitry is further configured to determine that the type of the reference picture of the current block and the type of the reference picture of the candidate block are different from each other in a case where a picture of the candidate block and the reference picture of the candidate block are different from each other.

3. The image processing apparatus according to claim 2 , wherein the predetermined position is a head of the list of candidates.

4. The image processing apparatus according to claim 1 , wherein the predetermined position is a head of the list of candidates.

5. The image processing apparatus according to claim 1 , wherein

the circuitry is further configured to rearrange order of the candidates of the reference picture in the list, before registering the picture of the current block.

6. The image processing apparatus according to claim 2 , wherein

the circuitry is further configured to rearrange order of the candidates of the reference picture in the list, before registering the picture of the current block.

7. The image processing apparatus according to claim 3 , wherein

the circuitry is further configured to rearrange order of the candidates of the reference picture in the list, before registering the picture of the current block.

8. The image processing apparatus according to claim 4 , wherein

the circuitry is further configured to rearrange order of the candidates of the reference picture in the list, before registering the picture of the current block.

9. The image processing apparatus according to claim 1 , wherein

the circuitry is further configured to rearrange order of the candidates of the reference picture other than the picture of the current block in the list, after registering the picture of the current block.

10. The image processing apparatus according to claim 2 , wherein

the circuitry is further configured to rearrange order of the candidates of the reference picture other than the picture of the current block in the list, after registering the picture of the current block.

11. The image processing apparatus according to claim 3 , wherein

the circuitry is further configured to rearrange order of the candidates of the reference picture other than the picture of the current block in the list, after registering the picture of the current block.

12. An image processing method comprising:

excluding, in a case where a type of a reference picture of a current block and a type of a reference picture of a candidate block corresponding to a candidate of a reference motion vector are different from each other and neither the type of the reference picture of the current block nor the type of the reference picture of the candidate block is Short-Term Reference Picture (STRP), a motion vector of the candidate block from candidates of the reference motion vector;

generating, in a case where a type of the reference picture of the current block and the type of the reference picture of the candidate block are each STRP, a predicted vector of a current motion vector by performing scaling on the reference motion vector on a basis of a difference in picture order count (POC) between the reference picture of the current block and the reference picture of the candidate block;

generating, in a case where the type of the reference picture of the current block and the type of the reference picture of the candidate block are each Intra Block Copy (Intra BC), the predicted vector of the current motion vector by setting the reference motion vector to the predicted vector without scaling;

generating, in a case where the type of the reference picture of the current block and the type of the reference picture of the candidate block are each Long-Term Reference Picture (LTRP), the predicted vector of the current motion vector by setting the reference motion vector to the predicted vector without scaling;

registering a picture of the current block in a predetermined position of a list of candidates of the reference picture of the current block;

adding a difference vector between the current motion vector and the predicted vector to the predicted vector; and

generating the current motion vector using the predicted vector and the list.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2024
From: NAKAGAMI, OHJI
To: SONY CORPORATION
Reel/Frame 067675/0644 →
Priority Claims (1)
JP 2014-265786 · Dec 26, 2014 · national
Continuity (4)
Continuation 17217513 · Mar 30, 2021
Continuation 16861377 · Apr 29, 2020
Continuation 15516992
Related Publication 20240333966A1 · Oct 3, 2024
References Cited (44)
US 9374598B2 · Park · 2016 [cited by examiner]
US 20090323801A1 · Imajou · 2009 [cited by examiner]
US 20130107965A1 · Wahadaniah et al. · 2013 [cited by applicant]
US 20140023144A1 · Park · 2014 [cited by examiner]
US 20140126642A1 · Takahashi et al. · 2014 [cited by applicant]
US 20140211851A1 · Miyoshi · 2014 [cited by examiner]
US 20140307783A1 · Kim · 2014 [cited by examiner]
US 20150271515A1 · Pang · 2015 [cited by examiner]
US 20150350674A1 · Laroche · 2015 [cited by examiner]
US 20160100186A1 · Gisquet · 2016 [cited by examiner]
US 20170289566A1 · He · 2017 [cited by examiner]
US 20170302936A1 · Li · 2017 [cited by examiner]
US 20170302949A1 · Malamal Vadakital · 2017 [cited by examiner]
CN 103004198A · 2013 [cited by applicant]
CN 103348679A · 2013 [cited by applicant]
CN 103931192A · 2014 [cited by applicant]
EP 2717576A1 · 2014 [cited by applicant]
JP 2013059023A · 2013 [cited by examiner]
WO WO2013024588A1 · 2013 [cited by examiner]
WO WO2013168407A1 · 2013 [cited by applicant]
WO WO2014007521A1 · 2014 [cited by applicant]
WO WO2014065947A1 · 2014 [cited by examiner]
WO WO2014097912A1 · 2014 [cited by applicant]
WO WO2016048834A1 · 2016 [cited by examiner]
Takahashi etal. “High-level Syntax: Motion vector prediction issue for Long-term reference picture” Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG 16 WP3 and ISO/IEC JTC 1/SC 29/WG 11, tenth meeting: Stoc… [cited by examiner]
Li B. “Non-SCCEI: Unification of Intra BC and inter modes” Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 18th Meeting: Sappora, JP, Jun. 30-Jul. 9, 2014 (Year: 2014). [cited by examiner]
Rajan Joshi, et al., High Efficiency Video Coding (HEVC) Screen Content Coding: Draft 1, Joint Collaborative Team on Video Coding (JTC-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, Jun. 30-Jul. 9, 2014, pp. 1-3… [cited by applicant]
Jill Boyce, et al., Draft high efficiency video coding (HEVC) version 2, combined format range extensions (RExt), scalability (SHVC), and multi-view (MV-HEVC) extensions, Joint Collaborative Team on Video Coding (JTC-VC… [cited by applicant]
Yoshitomo Takahashi, et al., High-level Syntax: Motion vector prediction issue for long-term reference picture, Joint Collaborative Team on Video Coding (JTC-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, Jul. 1… [cited by applicant]
Chao Pang, et al., Non-CE2: Intra block copy with Inter signaling, Joint Collaborative Team on Video Coding (JTC-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, Oct. 17-24, 2014, pp. 1-4, 19 [cited by applicant]
Rajan Joshi, et al., Screen content coding test model 3 (SCM 3), Joint Collaborative Team on Video Coding (JTC-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, Oct. 17-24, 2014, pp. 1-12, 19 [cited by applicant]
May 25, 2018, European Search Report issued for related EP Application No. 15872748.7. [cited by applicant]
Li et al., Non-SCCE1: Unification of intra BC and inter modes, Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 18 [cited by applicant]
Flynn et al., High Efficiency Video Coding (HEVC) Range Extensions text specification: Draft 6, Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 16 [cited by applicant]
He et al., Non-CE2: Unification of IntraBC mode with inter mode, Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 19 [cited by applicant]
Chen et al., AHG10: Motion related hooks for HEVC multiview/3DV extension based on long-term reference pictures, Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG16 WP3 and ISO/IEC JTC1/SC29/WG11, 10 [cited by applicant]
Pang et al., Block vector prediction method for Intra block copy, Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 17 [cited by applicant]
Jun. 20, 2019, Chinese Office Action issued for related CN Application No. 201580069490.3. [cited by applicant]
Aug. 15, 2019, Japanese Office Action issued for related JP Application No. 2016-566104. [cited by applicant]
Dec. 10, 2019, Japanese Office Action issued for related JP Application No. 2016-566104. [cited by applicant]
Feb. 27, 2020, Japanese Office Action issued for related JP Application No. 2016-566104. [cited by applicant]
Feb. 27, 2020, Japanese Decision to Dismiss an Amendment issued for related JP Application No. 2016-566104. [cited by applicant]
Guionnet et al., CE5.h: Reducing the coding cost of merge index by dynamic merge index re-allocation, Joint Collaborative Team on 3D Video Coding Extension Development of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, … [cited by applicant]
Davies, BBC's Response to the Call for Proposals on Video Compression Technology, Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG16 WP3 and ISO/IEC JTC1/SC29/WG11, Apr. 15-23, 2010, pp. 1-31, 1st Meeting: … [cited by applicant]