PROGRAMMING CONTENT ADDRESSABLE MEMORY
A memory system includes a memory device comprising a programming buffer and a content addressable memory (CAM) block. The memory system further includes a processing device that receives a plurality of data entries to be stored at the memory device and stores the plurality of data entries in a plurality of pages of the programming buffer, each of the plurality of pages of the programming buffer comprising a respective subset of the plurality of data entries. The processing device further initiates a conversion operation to copy the plurality of data entries from the programming buffer to the CAM block. The conversion operation includes reading respective portions of each data entry in each respective subset of the plurality of data entries from the plurality of pages of the programming buffer, and writing the respective portions to respective CAM pages of the CAM block.
1 . A system comprising:
a memory device comprising a programming buffer and a content addressable memory (CAM) block; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
reading a first portion of each data entry of a plurality of data entries in the programming buffer;
programming the first portion of each data entry to a first CAM page of the CAM block;
reading a second portion of each data entry of the plurality of data entries in the programming buffer; and
programming the second portion of each data entry to a second CAM page of the CAM block.
2 . The system of claim 1 , wherein the CAM block comprises an array of memory cells organized into a plurality of strings, each string comprising a plurality of memory cells connected in series between a precharged match line and a page buffer, and wherein each of the plurality of memory cells is connected to one of a plurality of search lines.
3 . The system of claim 2 , wherein each respective CAM page of the CAM block is associated with a respective one of the plurality of search lines.
4 . The system of claim 2 , wherein once each portion of a given data entry is written to the CAM block, the given data entry is stored in the CAM block along one of the plurality of strings intersecting each of the plurality of search lines.
5 . The system of claim 1 , wherein the processing device is to perform operations further comprising:
determining that the programming buffer is full of data entries; and
responsive to determining that the programming buffer is full of data entries, initiating a conversion operation to copy the plurality of data entries from the programming buffer to the CAM block.
6 . The system of claim 1 , wherein the memory device comprises a negative and (NAND) type flash memory device.
7 . The system of claim 1 , wherein the programming buffer is not arranged using a CAM architecture.
8 . A method comprising:
reading a first portion of each data entry of a plurality of data entries in a programming buffer of a memory device;
programming the first portion of each data entry to a first content addressable memory (CAM) page of a CAM block of the memory device;
reading a second portion of each data entry of the plurality of data entries in the programming buffer; and
programming the second portion of each data entry to a second CAM page of the CAM block.
9 . The method of claim 8 , wherein the CAM block comprises an array of memory cells organized into a plurality of strings, each string comprising a plurality of memory cells connected in series between a precharged match line and a page buffer, and wherein each of the plurality of memory cells is connected to one of a plurality of search lines.
10 . The method of claim 9 , wherein each respective CAM page of the CAM block is associated with a respective one of the plurality of search lines.
11 . The method of claim 9 , wherein once each portion of a given data entry is written to the CAM block, the given data entry is stored in the CAM block along one of the plurality of strings intersecting each of the plurality of search lines.
12 . The method of claim 8 , further comprising:
determining that the programming buffer is full of data entries; and
responsive to determining that the programming buffer is full of data entries, initiating a conversion operation to copy the plurality of data entries from the programming buffer to the CAM block.
13 . The method of claim 8 , wherein the memory device comprises a negative and (NAND) type flash memory device.
14 . The method of claim 8 , wherein the programming buffer is not arranged using a CAM architecture.
15 . A non-transitory machine readable storage medium storing instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
reading a first portion of each data entry of a plurality of data entries in a programming buffer of a memory device;
programming the first portion of each data entry to a first content addressable memory (CAM) page of a CAM block of the memory device;
reading a second portion of each data entry of the plurality of data entries in the programming buffer; and
programming the second portion of each data entry to a second CAM page of the CAM block.
16 . The non-transitory machine readable storage medium of claim 15 , wherein the CAM block comprises an array of memory cells organized into a plurality of strings, each string comprising a plurality of memory cells connected in series between a precharged match line and a page buffer, and wherein each of the plurality of memory cells is connected to one of a plurality of search lines.
17 . The non-transitory machine readable storage medium of claim 16 , wherein each respective CAM page of the CAM block is associated with a respective one of the plurality of search lines.
18 . The non-transitory machine readable storage medium of claim 16 , wherein once each portion of a given data entry is written to the CAM block, the given data entry is stored in the CAM block along one of the plurality of strings intersecting each of the plurality of search lines.
19 . The non-transitory machine readable storage medium of claim 15 , wherein the memory device comprises a negative and (NAND) type flash memory device.
20 . The non-transitory machine readable storage medium of claim 16 , wherein the programming buffer is not arranged using a CAM architecture.