IP Library Granted Patent US 12,557,659
Granted Patent B2
US 12,557,659 · App. 18/788,822 · Granted Feb 17, 2026

Wire bonding method and apparatus for electromagnetic interference shielding

Inventors: Shaowu Huang (Sunnyvale, CA); Javier A. Delacruz (San Jose, CA)
Assignee: Adeia Semiconductor Technologies LLC
H01L23/552H01L21/566H01L23/3121H01L2224/48091H01L2224/48227H01L2224/49171H01L2924/15311H01L2924/19105H01L2924/19107H01L2924/3025
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Quick Facts
Patent No.
US 12,557,659
App. No.
18/788,822
Granted
Feb 17, 2026
Kind
B2
Abstract

Apparatuses relating generally to a microelectronic package having protection from electromagnetic interference are disclosed. In an apparatus thereof, a platform has an upper surface and a lower surface opposite the upper surface and has a ground plane. A microelectronic device is coupled to the upper surface of the platform. Wire bond wires are coupled to the ground plane with a pitch. The wire bond wires extend away from the upper surface of the platform with upper ends of the wire bond wires extending above an upper surface of the microelectronic device. The wire bond wires are spaced apart from one another to provide a fence-like perimeter to provide an interference shielding cage. A conductive layer is coupled to at least a subset of the upper ends of the wire bond wires for electrical conductivity to provide a conductive shielding layer to cover the interference shielding cage.

Claims (57)

1 . A packaged microelectronic device, comprising:

a first device disposed on a platform;

a second device disposed on the platform;

a third device disposed on the platform;

a first interference shield comprising a first plurality of wire bond wires, wherein:

at least a portion of the first interference shield is disposed between the first device and the second device; and

at least a portion of the first interference shield is disposed between the third device and the second device;

a second interference shield comprising a second plurality of wire bond wires, wherein:

at least a portion of the second interference shield is disposed between the first device and the second device; and

at least a portion of the second interference shield is disposed between the third device and the second device;

a first spacing between a first adjacent pair of wire bond wires in the first interference shield; and

a second spacing between a second adjacent pair of wire bond wires in the second interference shield, wherein the second spacing is different than the first spacing.

2 . The packaged microelectronic device of claim 1 , wherein the platform is a circuit board.

3 . The packaged microelectronic device of claim 1 , wherein the platform is a substrate.

4 . The packaged microelectronic device of claim 1 , wherein the platform is a redistribution layer.

5 . The packaged microelectronic device of claim 1 , wherein the platform is a silicon substrate.

6 . The packaged microelectronic device of claim 1 , further comprising a third interference shield comprising a third plurality of wire bond wires, wherein at least a portion of the third interference shield is disposed between the third device and the first device.

7 . The packaged microelectronic device of claim 1 , wherein:

the first spacing is about 1/10th or less than a first wavelength of electromagnetic radiation of a first frequency; and

the second spacing is about 1/10th or less than a second wavelength of electromagnetic radiation of a second frequency.

8 . The packaged microelectronic device of claim 1 , further comprising a fourth device disposed on the platform, wherein at least a portion of the first interference shield is disposed between the first device and the fourth device.

9 . The packaged microelectronic device of claim 8 , wherein at least a portion of the first interference shield is disposed between the fourth device and the third device.

10 . The packaged microelectronic device of claim 8 , wherein at least a portion of the second interference shield is disposed between the fourth device and the second device.

11 . The packaged microelectronic device of claim 1 , further comprising a fourth device disposed on the platform, wherein at least a portion of the second interference shield is disposed between the second device and the fourth device.

12 . The packaged microelectronic device of claim 11 , wherein at least a portion of the first interference shield is disposed between the fourth device and the first device.

13 . A packaged microelectronic device, comprising:

a first device disposed on a platform;

a second device disposed on the platform;

a third device disposed on the platform;

a first interference shield comprising a first plurality of wire bond wires, wherein:

the first interference shield intersects a shortest path between the first device and the second device, and

the first interference shield intersects a shortest path between the third device and the second device;

a second interference shield comprising a second plurality of wire bond wires, wherein:

the second interference shield intersects the shortest path between the first device and the second device, and

the second interference shield intersects the shortest path between the third device and the second device;

a first spacing between a first adjacent pair of wire bond wires in the first interference shield; and

a second spacing between a second adjacent pair of wire bond wires in the second interference shield, wherein the second spacing is larger than the first spacing.

14 . The packaged microelectronic device of claim 13 , wherein the platform is a circuit board.

15 . The packaged microelectronic device of claim 13 , wherein the platform is a substrate.

16 . The packaged microelectronic device of claim 13 , wherein the platform is a redistribution layer.

17 . The packaged microelectronic device of claim 13 , wherein the platform is a silicon substrate.

18 . The packaged microelectronic device of claim 13 , further comprising a third interference shield comprising a third plurality of wire bond wires, wherein at least a portion of the third interference shield is disposed between the third device and the first device.

19 . The packaged microelectronic device of claim 13 , wherein:

the first spacing is about 1/10th or less than a first wavelength of electromagnetic radiation of a first frequency; and

the second spacing is about 1/10th or less than a second wavelength of electromagnetic radiation of a second frequency.

20 . A packaged microelectronic device, comprising:

a first device disposed on a platform;

a second device disposed on the platform;

a third device disposed on the platform;

a first interference shield comprising a first plurality of wire bond wires, wherein:

the first device and the third device are on a first side of the first interference shield; and

the second device is on a second side of the first interference shield;

a second interference shield comprising a second plurality of wire bond wires, wherein:

the first device and the third device are on a first side of the second interference shield; and

the second device is on a second side of the second interference shield;

a first spacing between a first adjacent pair of wire bond wires in the first interference shield; and

a second spacing between a second adjacent pair of wire bond wires in the second interference shield, wherein the second spacing is different than the first spacing.

Assignments (4)
SECURITY INTEREST Recorded May 28, 2025
From: ADEIA INC. (F/K/A XPERI HOLDING CORPORATION); ADEIA HOLDINGS INC.; ADEIA MEDIA HOLDINGS INC.; ADEIA IMAGING LLC; ADEIA MEDIA LLC; ADEIA MEDIA SOLUTIONS INC.; ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.; ADEIA TECHNOLOGIES INC.; ADEIA GUIDES INC.; ADEIA SOLUTIONS LLC; ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.; ADEIA SEMICONDUCTOR SOLUTIONS LLC; ADEIA SEMICONDUCTOR INTELLECTUAL PROPERTY LLC; ADEIA SEMICONDUCTOR TECHNOLOGIES LLC; ADEIA PUBLISHING INC.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 071454/0343 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2025
From: HUANG, SHAOWU; DELACRUZ, JAVIER A.
To: INVENSAS CORPORATION
Reel/Frame 070697/0939 →
CHANGE OF NAME Recorded Apr 1, 2025
From: INVENSAS CORPORATION
To: INVENSAS LLC
Reel/Frame 070703/0585 →
CHANGE OF NAME Recorded Apr 1, 2025
From: INVENSAS LLC
To: ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
Reel/Frame 070703/0621 →
Continuity (7)
Continuation 18377706 · Oct 6, 2023
Continuation 17721154 · Apr 14, 2022
Continuation 16833445 · Mar 27, 2020
Continuation 15914617 · Mar 7, 2018
Continuation 15237936 · Aug 16, 2016
Provisional Application 62368423 · Jul 29, 2016
Related Publication 20250096151A1 · Mar 20, 2025
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