Thread creation on local or remote compute elements by a multi-threaded, self-scheduling processor
Representative apparatus, method, and system embodiments are disclosed for a self-scheduling processor which also provides additional functionality. Representative embodiments include a self-scheduling processor, comprising: a processor core adapted to execute a received instruction; and a core control circuit adapted to automatically schedule an instruction for execution by the processor core in response to a received work descriptor data packet. In another embodiment, the core control circuit is also adapted to schedule a fiber create instruction for execution by the processor core, to reserve a predetermined amount of memory space in a thread control memory to store return arguments, and to generate one or more work descriptor data packets to another processor or hybrid threading fabric circuit for execution of a corresponding plurality of execution threads. Event processing, data path management, system calls, memory requests, and other new instructions are also disclosed.
1 . An apparatus comprising:
a memory interface coupled to a memory;
a data cache;
an instruction cache; and
one or more processing elements configured to:
access data from the data cache; and
execute instructions from the instruction cache to perform operations comprising:
receiving a thread create instruction from a parent thread executing on the one or more processing elements, the thread create instruction indicating a number of return parameters to be generated by a child thread created by the thread create instruction;
reserving, via the memory interface and based on the number of return parameters, space in the memory to store the return parameters;
creating the child thread based at least in part on the reserving of the space in the memory; and
providing access to the return parameters from the reserved space to the parent thread based at least in part on a thread return instruction from the child thread.
2 . The apparatus of claim 1 , wherein the operations further comprise:
receiving a join instruction from the parent thread;
wherein the providing of the access to the return parameters from the reserved space to the parent thread is in response to the receipt of the join instruction.
3 . The apparatus of claim 2 , wherein the thread create instruction further indicates a caller identifier; and the caller identifier is provided to the parent thread in response to the receipt of the join instruction.
4 . The apparatus of claim 1 , wherein the thread create instruction from the parent thread uses a plurality of bits to indicate the number of return parameters.
5 . The apparatus of claim 1 , wherein the reserving of the space in the memory comprises reserving a predetermined number of bits for each return parameter.
6 . The apparatus of claim 1 , wherein the providing of the access to the return parameters from the reserved space to the parent thread comprises copying data from the reserved space to a register or register state of the parent thread.
7 . The apparatus of claim 1 , wherein the operations further comprise:
in response to the thread return instruction, checking that all operations initiated by the child thread either have been completed or have been acknowledged.
8 . The apparatus of claim 1 , wherein the operations further comprise:
waiting for all threads created by the child thread to complete before sending the thread return instruction from the child thread.
9 . The apparatus of claim 1 , wherein the thread create instruction further indicates whether to start the child thread on a local node or a remote node.
10 . The apparatus of claim 1 , wherein the creating of the child thread comprises:
beginning execution of the child thread from an address read from a register of the parent thread.
11 . The apparatus of claim 1 , wherein the thread create instruction further indicates a number of call arguments, and the call arguments are accessed from registers of the parent thread.
12 . The apparatus of claim 1 , wherein at least one processing element of the one or more processing elements is a hybrid threading processor.
13 . A non-transitory machine-readable medium that stores a plurality of instructions that, when executed by one or more processing elements, cause the one or more processing elements to perform operations comprising:
receiving a thread create instruction from a parent thread that indicates a number of return parameters to be generated by a child thread created by the thread create instruction;
reserving, based on the number of return parameters, space in a memory to store the return parameters;
creating the child thread based at least in part on the reserving of the space in the memory; and
providing access to the return parameters from the reserved space to the parent thread based at least in part on a thread return instruction from the child thread.
14 . The non-transitory machine-readable medium of claim 13 , wherein the operations further comprise:
receiving a join instruction from the parent thread;
wherein the providing of the access to the return parameters from the reserved space to the parent thread is in response to the receipt of the join instruction.
15 . The non-transitory machine-readable medium of claim 13 , wherein the thread create instruction from the parent thread that indicates the number of return parameters uses a plurality of bits to indicate the number of return parameters and selects one of 0, 1, 2, or 4 parameters.
16 . The non-transitory machine-readable medium of claim 13 , wherein the reserving of the space in the memory comprises reserving a predetermined number of bits for each return parameter.
17 . The non-transitory machine-readable medium of claim 13 , wherein the providing of the return parameters from the reserved space to the parent thread comprises copying data from the reserved space to a register or register state of the parent thread.
18 . The non-transitory machine-readable medium of claim 13 , wherein the operations further comprise:
in response to the thread return instruction, checking that all operations initiated by the child thread have either completed or been acknowledged.
19 . A method comprising:
receiving, by one or more processing elements, a thread create instruction from a parent thread that indicates a number of return parameters to be generated by a child thread created by the thread create instruction;
reserving, by the one or more processing elements, based on the number of return parameters, space in a memory to store the return parameters;
creating the child thread based at least in part on the reserving of the space in the memory; and
providing access to the return parameters from the reserved space to the parent thread based at least in part on a thread return instruction from the child thread.
20 . The method of claim 19 , further comprising:
waiting for all threads created by the child thread to complete before sending the thread return instruction from the child thread.
21 . The method of claim 19 , wherein the thread create instruction further indicates whether to start the child thread on a local node or a remote node.
22 . The method of claim 19 , wherein the creating of the child thread comprises:
beginning execution of the child thread from an address read from a register of the parent thread.
23 . The method of claim 19 , wherein:
the thread create instruction further indicates a number of call arguments; and the call arguments are accessed from registers of the parent thread.