IP Library Granted Patent US 12,671,430
Granted Patent B2
US 12,671,430 · App. 18/817,156 · Granted Jun 30, 2026

Method and system for end-to-end calibration of a channel emulator

Inventors: John Douglas Reed (Arlington, TX); Alfonso Rodriguez-Herrera (Denton, TX)
Assignee: VIAVI SOLUTIONS INC.
H03M1/1033H03M1/1245
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Quick Facts
Patent No.
US 12,671,430
App. No.
18/817,156
Filed
Aug 27, 2024
Granted
Jun 30, 2026
Kind
B2
Examiner
MAI, LAM T
Art Unit
2845
USPC
341/120
Abstract

The technology disclosed teaches a system and methods for end-to-end self-calibration of a channel emulator, wherein the channel emulator includes at least one channel emulator signal chain and at least one integrated parallel calibration signal chain. The channel emulator signal chain further includes an input signal, a first signal conditioner, a first analog-to-digital converter, a baseband processor, second signal conditioner, and an output. The integrated parallel calibration signal chain further includes a sequence generator, wherein the sequence generator is configured to generate a pseudo-random sequence upon which a calibration analysis signal is overlayed. On the supplying side, the sequence generator is coupled to a second digital-to-analog converter for supplying the calibration analysis signal to be processed by the channel emulator signal chain. On the evaluating side, the sequence generator is coupled to a comparator for evaluating results of the processed calibration analysis signal.

Claims (46)

1 . A channel emulator configured to perform self-calibration, the channel emulator including:

at least one channel emulator signal chain, wherein the at least one channel emulator signal chain further includes:

an input, coupled to a first signal conditioner, the first signal conditioner being coupled to a first analog-to-digital converter, the first analog-to-digital converter being coupled to a dynamically calibrated baseband processor, the dynamically calibrated baseband processor being coupled to a second signal conditioner, and the second signal conditioner being coupled to an output,

wherein the dynamically calibrated baseband processor receives a clock signal from a master clock; and

at least one integrated parallel calibration signal chain, wherein the integrated parallel calibration signal chain further includes:

a sequence generator, including a signal modulator, and a comparator wherein:

the sequence generator is configured to: (i) receive the clock signal from the master clock, (ii) generate a pseudo-random sequence, and (iii) produce a calibration analysis signal overlaying the pseudo-random sequence,

on a supplying side, the sequence generator is coupled to a second digital-to-analog converter to supply the calibration analysis signal to be processed by the channel emulator signal chain, and

on an evaluating side, the sequence generator is coupled to the comparator to evaluate results of the processed calibration analysis signal, received from the channel emulator signal chain.

2 . The channel emulator of claim 1 , further including the first signal conditioner being coupled to a first down converter, the first down converter being coupled to the first analog to digital converter.

3 . The channel emulator of claim 2 , further including the dynamically calibrated baseband processor being coupled to a first up converter, the first up converter being coupled to a second signal conditioner.

4 . The channel emulator of claim 3 , wherein, on the supplying side, the second digital-to-analog converter is coupled to a second up converter, which is coupled to the input to the channel emulator signal chain.

5 . The channel emulator of claim 3 , wherein, on the evaluating side, the output of the channel emulator signal chain is coupled to a second down converter, the second down converter being coupled to a second analog-to-digital converter, and the second analog-to-digital converter being coupled to the comparator.

6 . The channel emulator of claim 1 , wherein an output of the comparator is coupled to the dynamically calibrated baseband processor as a calibration analysis signal.

7 . The channel emulator of claim 6 , wherein a sequence generation logic of the sequence generator generates a wideband signal, a two-tone signal, or a single tone signal (i) for the processing by the channel emulator signal chain and (ii) for the use by the comparator in an evaluation of the results of the processed calibration analysis signal.

8 . The channel emulator of claim 1 , wherein an evaluation of the results of the processed calibration analysis signal further includes:

selecting at least one signal component received from the output corresponding to a processed calibration analysis signal;

delay and time matching a calibration analysis signal sent to the input of the channel emulator signal chain with the output corresponding to a processed calibration analysis signal;

analyzing differences between a calibration analysis signal sent to the input of the channel emulator signal chain and the output corresponding to a processed calibration analysis signal; and

processing the analyzed differences to derive adjustments in parameters used by the dynamically calibrated baseband processor, wherein the parameters include one or more of a delay parameter, an amplitude parameter, and a flatness parameter.

9 . The channel emulator of claim 1 , wherein the sequence generator is configured to generate, as an alternative to the pseudo-random sequence, a maximum length sequence, a Gold sequence, a generalized chirp-like sequence, or a Zadoff-Chu sequence.

10 . The channel emulator of claim 1 , further including a plurality of integrated parallel calibration signal chains, wherein each respective integrated parallel calibration signal chain includes a different pseudo-random sequence.

11 . The channel emulator of claim 1 , further including a plurality of integrated parallel calibration signal chains, wherein each integrated parallel calibration signal chain of the plurality of integrated parallel calibration signal chains includes the same pseudo-random sequence, and an orthogonal Walsh code is used to keep the pseudo-random sequences of the plurality of integrated parallel calibration signal chains, on a single port, orthogonal to one another.

12 . The channel emulator of claim 1 , further including an arbitrary waveform generator configured to:

create a specific modulated waveform to measure an error vector magnitude of the channel emulator signal chain;

generate two tones separated by a give frequency to measure intermodulation of the channel emulator signal chain; or

generate a specific modulated waveform and control an output impedance, in order to find an optimum operating point of a final amplifier.

13 . The channel emulator of claim 1 , wherein the first and second signal conditioners perform one or more of an impedance matching, an attenuation, an amplification, or a filtering of one or more signals.

14 . A method of self-calibrating a channel emulator, the method including:

the channel emulator, including a dynamically calibrated baseband processor, invoking at least one integrated calibration signal chain from a channel emulator signal chain, wherein the integrated calibration signal chain includes a sequence generator, and the sequence generator further includes a signal modulator;

the sequence generator generating a pseudo-random sequence and the signal modulator overlaying a calibration analysis signal on the pseudo-random sequence, wherein the calibration analysis signal is a wideband signal, a two-tone signal, or a single tone signal to be processed by the channel emulator signal chain; and

the sequence generator supplying the calibration analysis signal to be processed by the channel emulator signal chain and supplying the calibration analysis signal to a comparator to evaluate results of the calibration analysis signal processed by the channel emulator signal chain.

15 . The method of claim 14 , wherein an evaluation of the results of the processed calibration analysis signal further includes:

selectively filtering at least one signal component from the output of the channel emulator signal chain, the selected signal component corresponding to a processed calibration analysis signal;

delay and time matching the calibration analysis signal sent out to the input of the channel emulator signal chain with the processed calibration analysis signal received from the output of the channel emulator signal chain; and

analyzing differences between the calibration analysis signal and the processed calibration analysis signal received, and deriving, from the analysis, adjustments in delay, amplitude, phase, and flatness parameters.

16 . The method of claim 15 , further including the comparator passing the derived adjustments to the dynamically calibrated baseband processor.

17 . The method of claim 15 , further including the comparator storing the derived adjustments in a memory for future use.

18 . The method of claim 15 , further including the comparator detecting an out-of-range value for the delay, amplitude, phase, and flatness parameters and reporting the detected out-of-range value to a user.

19 . A non-transitory computer readable storage medium impressed with computer program instructions for channel emulator self-calibration, the instructions, when executed on a processor, causing the processor to implement a method comprising:

the channel emulator, including a dynamically calibrated baseband processor, invoking at least one integrated calibration signal chain from a channel emulator signal chain, wherein the integrated calibration signal chain includes a sequence generator, and the sequence generator further includes a signal modulator;

the sequence generator generating a pseudo-random sequence and the signal modulator overlaying a calibration analysis signal on the pseudo-random sequence, wherein the calibration analysis signal is a wideband signal, a two-tone signal, or a single tone signal to be processed by the channel emulator signal chain; and

the sequence generator supplying the calibration analysis signal to be processed by the channel emulator signal chain and supplying the calibration analysis signal to a comparator to evaluate results of the calibration analysis signal processed by the channel emulator signal chain.

20 . The non-transitory computer readable storage medium of claim 19 , further including:

a signal canceller receiving the evaluated results of the calibration analysis signal processed by the channel emulator signal chain; and

calculating, from the evaluated results of the calibration analysis signal processed by the channel emulator signal chain, a Power Delay Profile (PDP), Autocorrelation/Doppler Spectrum, cross-polarization discrimination ratio (XPR) fading Cumulative and Probability Density Functions (CDF/PDF) on a per-radio link basis or output port basis, correlation matrix of the radio links, or a Signal-to-Noise Radio (SNR) on a per-radio link basis or output port basis.

Assignments (5)
RELEASE OF SECURITY INTEREST AT REEL/FRAME 73189/0873 Recorded May 28, 2026
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
To: INERTIAL LABS, INC.; VIAVI SOLUTIONS INC.; VIAVI SOLUTIONS LICENSING LLC
Reel/Frame 075642/0381 →
SECURITY INTEREST Recorded Nov 14, 2025
From: VIAVI SOLUTIONS INC.; VIAVI SOLUTIONS LICENSING LLC; INERTIAL LABS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS AGENT
Reel/Frame 073571/0137 →
SECURITY AGREEMENT Recorded Oct 21, 2025
From: INERTIAL LABS, INC.; VIAVI SOLUTIONS INC.; VIAVI SOLUTIONS LICENSING LLC
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 073189/0873 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2025
From: SPIRENT COMMUNICATIONS, INC.
To: VIAVI SOLUTIONS LICENSING LLC
Reel/Frame 073121/0549 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2024
From: REED, JOHN DOUGLAS; RODRIGUEZ-HERRERA, ALFONSO
To: SPIRENT COMMUNICATIONS, INC.
Reel/Frame 068559/0693 →
Continuity (1)
Related Publication 20260066915A1 · Mar 5, 2026
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