IP Library Granted Patent US 12,413,337
Granted Patent B2
US 12,413,337 · App. 16/716,350 · Granted Sep 9, 2025

Accelerated parallel processing of 5G NR signal information

Inventors: Christian Ibars Casas (San Jose, CA); Harsha Deepak Banuli Nanje Gowda (Santa Clara, CA); Jeremy David Furtek (San Antonio, TX); James Hansen Delfeld (Austin, TX); Andrea Miele (San Jose, CA); Vikrama Ditya (Pleasanton, CA)
Assignee: NVIDIA Corporation
H04L1/0061H04W4/40H04W88/06H04W88/08G06T1/20H04W92/02
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Quick Facts
Patent No.
US 12,413,337
App. No.
16/716,350
Granted
Sep 9, 2025
Kind
B2
Abstract

Apparatuses, systems, and techniques to perform signal processing operations in a fifth generation (5G) new radio (NR) network using one or more parallel processing units (PPUs). In at least one embodiment, one or more PPUs implement signal processing in a baseband unit (BBU) performing 5G NR physical layer operations in a communication network.

Claims (39)

1. One or more processors comprising:

one or more circuits to encode or decode one or more fifth generation (5G) new radio signals information based, at least in part, on two or more graphics processing unit (GPU) kernels to be performed in parallel, wherein each of the two or more GPU kernels is to perform a different 5G baseband operation that is part of encoding or decoding the 5G new radio signals information.

2. The one or more processors of claim 1 , wherein the one or more circuits are to encode or decode the one or more 5G new radio signals by performing one or more physical layer steps, where the one or more physical layer steps are partially performed by one or more GPUs and partially performed by a central processing unit (CPU).

3. The one or more processors of claim 1 , wherein encoding the one or more 5G new radio signals comprises launching the two or more GPU kernels to perform one or more signal processing blocks.

4. The one or more processors of claim 3 , wherein the one or more signal processing blocks are physical uplink shared channel (PUSCH) signal processing blocks.

5. The one or more processors of claim 3 , wherein the one or more signal processing blocks are physical downlink shared channel (PDSCH) signal processing blocks.

6. The one or more processors of claim 1 , wherein the processor is to send and receive the one or more 5G new radio signals directly from one or more network interface controllers.

7. The one or more processors of claim 6 , wherein the two or more GPU kernels are to be performed by one or more graphics processing units.

8. A system comprising:

one or more processors to encode or decode one or more fifth generation (5G) new radio signals information based, at least in part, on two or more graphics processing unit (GPU) kernels to be performed in parallel, wherein each of the two or more GPU kernels is to perform a different 5G baseband operation that is part of encoding or decoding the 5G new radio signal information.

9. The system of claim 8 , wherein the one or more processors are to encode or decode one or more 5G new radio signals further comprises to perform one or more stages of 5G signal processing by at least performing physical layer operations using software instructions executed partially by one or more parallel processing units.

10. The system of claim 9 , wherein the software instructions executed by the one or more GPUs are controlled by additional instructions being executed by a central processing unit.

11. The system of claim 9 , wherein the physical layer operations are performed by launching GPU functions from a central processing unit (CPU) host.

12. The system of claim 8 , wherein the one or more processors to encode or decode one or more 5G new radio signals further comprises to perform one or more stages of 5G signal processing, where the one or more stages of the 5G signal processing are of a 5G physical layer and the one or more stages are performed in response to an application programming interface (API) call from a different layer than the physical layer.

13. The system of claim 8 , wherein the one or more processors are to encode or decode one or more 5G new radio signals further comprises to perform one or more stages of 5G signal processing, wherein the one or more stages of 5G signal processing are performed on one or more signals transmitted or received by one or more network interface controllers.

14. The system of claim 8 , wherein the one or more processors are to receive the one or more 5G new radio signals directly from one or more network interface controllers.

15. The system of claim 8 , wherein the one or more processors include one or more graphics processing units.

16. A non-transitory machine-readable medium having stored thereon a set of instructions, which if performed by one or more processors, cause the one or more processors to at least:

encode or decode one or more fifth generation (5G) new radio signals-signal based, at least in part, on two or more graphics processing unit GPU kernels to be performed in parallel, wherein each of the two or more GPU kernels is to perform a different 5G baseband operation that is part of encoding or decoding the 5G new radio information.

17. The non-transitory machine-readable medium of claim 16 , wherein the instructions, if performed, further cause the one or more processors to perform one or more physical layer steps to encode and decode the one or more 5G new radio signals, where the one or more physical layer steps are partially performed by one or more GPUs and partially performed by a central processing unit (CPU).

18. The non-transitory machine-readable medium of claim 16 , wherein encoding and decoding the one or more 5G new radio signals-signal further comprises launching one or more parallel processing unit kernels to perform one or more signal processing blocks on one or more GPUs.

19. The non-transitory machine-readable medium of claim 18 , wherein the one or more signal processing blocks are physical uplink shared channel (PUSCH) signal processing blocks.

20. The non-transitory machine-readable medium of claim 18 , wherein the one or more signal processing blocks are physical downlink shared channel (PDSCH) signal processing blocks.

21. The non-transitory machine-readable medium of claim 16 , wherein the one or more processors send and receive the one or more 5G new radio signals directly from one or more network interface controllers.

22. The non-transitory machine-readable medium of claim 16 , wherein encoding the one or more 5G new radio signals is performed by launching at least one of: a physical uplink shared channel (PUSCH) beamforming kernel, a PUSCH front-end kernel, a PUSCH de-rate-matching kernel, a PUSCH low density parity check (LDPC) kernel, or a cyclic redundancy check (CRC) kernel.

23. The non-transitory machine-readable medium of claim 16 , wherein decoding the one or more 5G new radio signals is performed by launching at least one of: a physical downlink shared channel (PDSCH) beamforming kernel, a PDSCH rate matching kernel, a PDSCH low density parity check (LDPC) kernel, or a cyclic redundancy check (CRC) kernel.

24. The non-transitory machine-readable medium of claim 16 , wherein the one or more 5G new radio signals are transmitted and received through one or more network interface controllers.

25. A method, comprising:

encoding or decoding one or more fifth generation (5G) new radio signal information based, at least in part, on two or more graphics processing unit (GPU) kernels to be performed in parallel, wherein each of the two or more GPU kernels is to perform a different 5G baseband operation that is part of encoding or decoding the 5G new radio information.

26. The method of claim 25 , further comprising performing one or more stages of 5G new radio signal processing, by at least performing physical layer operations using software functions executed by two or more GPU.

27. The method of claim 26 , wherein the software functions executed by the one or more parallel processing units are controlled by a central processing unit (CPU).

28. The method of claim 26 , wherein the software functions implement one or more signal processing operation of the physical layer.

29. The method of claim 28 , wherein the one or more signal processing operations are physical uplink shared channel (PUSCH) signal processing operations.

30. The method of claim 28 , wherein the one or more signal processing operations are physical downlink shared channel (PDSCH) signal processing operations.

31. The method of claim 25 , wherein the one or more parallel processing units receive one or more signals for 5G new radio signal processing directly from one or more network interface controllers.

32. The method of claim 25 , wherein the two or more GPU kernels are to be performed by one or more graphics processing units.

33. The one or more processors of claim 1 , wherein a decoded portion of the one or more 5G new radio signals is to be output by one or more parallel processing units.

34. The one or more processors of claim 1 , wherein the one or more circuits are to receive, from a first layer, 5G new radio signal information;

encode or decode, at a different layer, the one or more 5G new radio signals based, at least in part, on two or more graphics processing unit (GPU) kernels to be performed in parallel.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2020
From: IBARS CASAS, CHRISTIAN; BANULI NANJE GOWDA, HARSHA DEEPAK; FURTEK, JEREMY DAVID; DELFELD, JAMES HANSEN; MIELE, ANDREA; DITYA, VIKRAMA
To: NVIDIA CORPORATION
Reel/Frame 052026/0758 →
Continuity (1)
Related Publication 20210184795A1 · Jun 17, 2021
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