IP Library Granted Patent US 12,718,870
Granted Patent B2
US 12,718,870 · App. 18/820,840 · Granted Aug 25, 2026

Memory device for wafer-on-wafer formed memory and logic

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Quick Facts
Patent No.
US 12,718,870
App. No.
18/820,840
Filed
Aug 30, 2024
Granted
Aug 25, 2026
Kind
B2
Examiner
HUANG, MIN
Art Unit
2827
USPC
365/244
Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 30, 2024
From: HUSH, GLEN E.; ZAIDY, ALIASGER T.; EILERT, SEAN S.; PAREKH, KUNAL R.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 068451/0728 →
Continuity (3)
Continuation 17712935 · Apr 4, 2022
Provisional Application 63231660 · Aug 10, 2021
Related Publication 20240420757A1 · Dec 19, 2024
References Cited (12)
US 10665580B1 · Hosoda et al. · 2020 [cited by applicant]
US 11430766B2 · Liu et al. · 2022 [cited by applicant]
US 12112792B2 · Hush · 2024 [cited by examiner]
US 20030126314A1 · Litt · 2003 [cited by applicant]
US 20160172028A1 · Park et al. · 2016 [cited by applicant]
US 20190043836A1 · Fastow et al. · 2019 [cited by applicant]
US 20200135720A1 · Brewer · 2020 [cited by applicant]
US 20200243486A1 · Quader · 2020 [cited by examiner]
US 20210118488A1 · Kim · 2021 [cited by examiner]
US 20210225430A1 · O · 2021 [cited by examiner]
US 20220230695A1 · Park et al. · 2022 [cited by applicant]
US 20230048855A1 · Eilert et al. · 2023 [cited by applicant]