SYSTEM AND METHOD FOR PARTIAL CHECKSUM CALCULATION WITH A SHARED SUB-MATRIX
A system and method for a partial checksum calculation using a shared matrix. A method for operating a memory device includes: determining, by the memory device, a shared sub-matrix from among multiple sub-matrices for a partial checksum calculation, the multiple sub-matrices being derived from a parity check matrix used in the controller; determining, by the memory device, a target sub-matrix from among the multiple sub-matrices for performing the partial checksum calculation, based on the shared sub-matrix and indication information for locating one or more of the multiple sub-matrices; and performing, by the memory device, the partial checksum calculation on a syndrome sequence based on a codeword sequence and the target sub-matrix.
1 . A memory system comprising:
a controller configured to encode write data using a parity check matrix to generate a codeword sequence; and
a memory device including a plurality of memory cells, a control circuit and a partial checksum calculator, and configured to receive the codeword sequence from the controller, store the codeword sequence in the plurality of memory cells, and read the codeword sequence from the plurality of memory cells,
wherein the control circuit is configured to:
determine a shared sub-matrix from among multiple sub-matrices for a partial checksum calculation, the multiple sub-matrices being derived from the parity check matrix, and
wherein the partial checksum calculator is configured to:
determine a target sub-matrix from among the multiple sub-matrices for performing the partial checksum calculation, based on the shared sub-matrix and indication information for locating one or more of the multiple sub-matrices; and
perform the partial checksum calculation on a syndrome sequence based on the codeword sequence and the target sub-matrix.
2 . The memory system of claim 1 , wherein the control circuit is further configured to hardcode the indication information.
3 . The memory system of claim 1 , wherein the multiple sub-matrices differ from each other and the sizes of the multiple sub-matrices are different.
4 . The memory system of claim 3 , wherein the shared sub-matrix includes multiple rows from all the multiple sub-matrices and includes a consecutive subset of columns in each of the multiple sub-matrices.
5 . The memory system of claim 4 , wherein circulants on different rows of the shared sub-matrix are not overlapped with one or more circulants on the same column.
6 . The memory system of claim 4 , wherein all circulants in the remaining sub-matrix are identity matrices.
7 . The memory system of claim 1 , wherein the indication information includes a start column index and an end column index for each of the multiple sub-matrices.
8 . The memory system of claim 1 , wherein the indication information includes a start column index, and a distance value from a last column index of the parity check matrix to an end column index for each of the multiple sub-matrices.
9 . The memory system of claim 8 , wherein the distance value has a bit-width less than the end column index for each of the multiple sub-matrices.
10 . A method for operating a memory system including a controller and a memory device, the method comprising:
determining, by the memory device, a shared sub-matrix from among multiple sub-matrices for a partial checksum calculation, the multiple sub-matrices being derived from a parity check matrix used in the controller;
determining, by the memory device, a target sub-matrix from among the multiple sub-matrices for performing the partial checksum calculation, based on the shared sub-matrix and indication information for locating one or more of the multiple sub-matrices; and
performing, by the memory device, the partial checksum calculation on a syndrome sequence based on a codeword sequence and the target sub-matrix.
11 . The method of claim 10 , further comprising hardcoding the indication information.
12 . The method of claim 10 , wherein the multiple sub-matrices differ from each other and the sizes of the multiple sub-matrices are different.
13 . The method of claim 12 , wherein the shared sub-matrix includes multiple rows from all the multiple sub-matrices and includes a consecutive subset of columns in each of the multiple sub-matrices.
14 . The method of claim 13 , wherein circulants on different rows of the shared sub-matrix are not overlapped with one or more circulants on the same column.
15 . The method of claim 13 , wherein all circulants in the remaining sub-matrix are identity matrices.
16 . The method of claim 10 , wherein the indication information includes a start column index and an end column index for each of the multiple sub-matrices.
17 . The method of claim 10 , wherein the indication information includes a start column index, and a distance value from a last column index of the parity check matrix to an end column index for each of the multiple sub-matrices.
18 . The method of claim 17 , wherein the distance value has a bit-width less than the end column index for each of the multiple sub-matrices.